LFE2-50E-5F484I Lattice, LFE2-50E-5F484I Datasheet - Page 17

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LFE2-50E-5F484I

Manufacturer Part Number
LFE2-50E-5F484I
Description
FPGA 48000 CELLS 90NM (CMOS) 1.2
Manufacturer
Lattice
Series
ECP2r
Datasheet

Specifications of LFE2-50E-5F484I

Number Of Logic Elements/cells
48000
Number Of Labs/clbs
6000
Total Ram Bits
396288
Number Of I /o
339
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-BBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3220905AABC
Lattice Semiconductor
Edge Clock Sources
Edge clock resources can be driven from a variety of sources at the same edge. Edge clock resources can be
driven from adjacent edge clock PIOs, primary clock PIOs, PLLs/DLLs and clock dividers as shown in Figure 2-12.
Figure 2-12. Edge Clock Sources
From Routing
From Routing
Sources for left edge clocks
Input
Input
DLL
PLL
Clock
Clock
Input
Input
DLLDELA
GPLL
DLL
Routing
Routing
From
From
Eight Edge Clocks (ECLK)
Two Clocks per Edge
Clock Input
Clock Input
2-14
Clock Input
Clock Input
Routing
Routing
From
From
Sources for top
LatticeECP2/M Family Data Sheet
bottom edge
Sources for
edge clocks
clocks
Sources for right edge clocks
GPLL
DLL
DLLDELA
Architecture
From Routing
From Routing
Clock
Clock
Input
Input
Input
Input
DLL
PLL

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