LFE2-50E-5F484I Lattice, LFE2-50E-5F484I Datasheet - Page 254
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-50E-5F484I
Manufacturer Part Number
LFE2-50E-5F484I
Description
FPGA 48000 CELLS 90NM (CMOS) 1.2
Manufacturer
Lattice
Series
ECP2r
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-50E-5F484I
Number Of Logic Elements/cells
48000
Number Of Labs/clbs
6000
Total Ram Bits
396288
Number Of I /o
339
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-BBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3220905AABC
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Lattice Semiconductor
LFE2M50E/SE Logic Signal Connections: 484 fpBGA (Cont.)
Ball Number
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
VCCIO
GNDIO
GNDIO
VCCIO
M7
M1
M2
M6
M5
M3
M4
N7
N6
N1
N2
P6
N5
P1
P2
P3
P4
P5
P7
R1
R2
R3
R4
R6
R5
L1
L2
L5
L3
L4
Ball/Pad Function
GNDIO7
GNDIO7
GNDIO6
GNDIO6
GNDIO6
GNDIO6
GNDIO6
VCCIO7
VCCIO6
VCCIO6
VCCIO6
VCCIO6
VCCIO6
PL36A
PL36B
PL37A
PL37B
PL38A
PL38B
PL39A
PL39B
PL41A
PL41B
PL42A
PL42B
PL45A
PL45B
PL46A
PL46B
PL52A
PL52B
PL53A
PL53B
PL54A
PL54B
PL55A
PL55B
PL62A
PL62B
PL63A
PL63B
PL64A
PL64B
LFE2M50E/SE
4-154
Bank
7
7
7
7
7
7
7
7
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
-
-
-
-
-
-
-
LatticeECP2/M Family Data Sheet
LLM0_GPLLC_IN_A**
LLM0_GDLLC_IN_A**
LLM0_GPLLT_IN_A**
LLM0_GDLLT_IN_A**
LLM0_GPLLC_FB_A
LLM3_SPLLC_FB_A
LLM0_GPLLT_FB_A
LLM3_SPLLC_IN_A
LLM3_SPLLT_FB_A
LLM3_SPLLT_IN_A
PCLKC7_0/LDQ36
PCLKT7_0/LDQ36
Dual Function
LDQS52****
PCLKC6_0
PCLKT6_0
VREF2_6
VREF1_6
LDQS36
LDQ36
LDQ36
LDQ36
LDQ36
LDQ36
LDQ52
LDQ52
LDQ52
LDQ52
LDQ52
LDQ52
LDQ52
Pinout Information
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
T
T
T
T
T
T
T
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