LFE2-50E-5F484I Lattice, LFE2-50E-5F484I Datasheet - Page 293
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFE2-50E-5F484I
Manufacturer Part Number
LFE2-50E-5F484I
Description
FPGA 48000 CELLS 90NM (CMOS) 1.2
Manufacturer
Lattice
Series
ECP2r
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-50E-5F484I
Number Of Logic Elements/cells
48000
Number Of Labs/clbs
6000
Total Ram Bits
396288
Number Of I /o
339
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-BBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q3220905AABC
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LFE2M50E/SE and LFE2M70E/SE Logic Signal Connections: 900 fpBGA
Lattice Semiconductor
Number
GNDIO
GNDIO
GNDIO
GNDIO
GNDIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
M30
M29
M27
M28
Ball
R23
R22
P30
R29
N30
N29
R27
R28
P29
P28
P23
P24
R26
P27
P25
P26
K30
K29
N22
P22
N24
N23
N25
N26
H30
G30
T22
T29
T28
T27
T26
J30
J29
-
Function
Ball/Pad
GNDIO3
GNDIO3
GNDIO2
GNDIO2
GNDIO2
VCCIO3
VCCIO3
VCCIO3
VCCIO2
VCCIO2
VCCIO2
PR49A
PR48B
PR48A
PR46B
PR46A
PR45B
PR45A
PR44B
PR44A
PR43B
PR43A
PR42B
PR42A
PR41B
PR41A
PR39B
PR39A
PR38B
PR38A
PR37B
PR37A
PR36B
PR36A
PR35B
PR35A
PR34B
PR34A
PR33B
PR33A
PR32B
PR32A
PR30B
PR30A
PR29B
PR29A
PR28B
PR28A
-
LFE2M50E/SE
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
-
-
-
-
-
-
RUM3_SPLLC_FB_A/RDQ36
RUM3_SPLLT_FB_A/RDQ36
RUM3_SPLLC_IN_A/RDQ36
RUM3_SPLLT_IN_A/RDQ36
RLM3_SPLLC_FB_A
RLM3_SPLLT_FB_A
RLM3_SPLLC_IN_A
RLM3_SPLLT_IN_A
PCLKC2_0/RDQ36
PCLKT2_0/RDQ36
Dual Function
PCLKC3_0
PCLKT3_0
VREF2_3
VREF1_3
RDQS36
RDQ52
RDQ52
RDQ52
RDQ36
RDQ36
RDQ36
RDQ36
RDQ36
RDQ36
RDQ36
RDQ36
RDQ36
RDQ27
RDQ27
RDQ27
RDQ27
RDQ27
RDQ27
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
4-193
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
Function
Ball/Pad
VCCIO3
GNDIO3
VCCIO3
GNDIO3
VCCIO3
GNDIO2
VCCIO2
GNDIO2
VCCIO2
GNDIO2
VCCIO2
PR61A
PR60B
PR60A
PR58B
PR58A
PR57B
PR57A
PR56B
PR56A
PR53B
PR53A
PR52B
PR52A
PR51B
PR51A
PR49B
PR49A
PR48B
PR48A
PR47B
PR47A
PR46B
PR46A
PR45B
PR45A
PR44B
PR44A
PR43B
PR43A
PR42B
PR42A
PR40B
PR40A
PR39B
PR39A
PR38B
PR38A
-
LatticeECP2/M Family Data Sheet
Bank
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
-
-
-
-
-
-
LFE2M70E/SE
RLM3_SPLLC_FB_A/RDQ55
RUM3_SPLLC_FB_A/RDQ46
RUM3_SPLLT_FB_A/RDQ46
RUM3_SPLLC_IN_A/RDQ46
RLM3_SPLLT_FB_A/RDQ55
RLM3_SPLLC_IN_A/RDQ55
RLM3_SPLLT_IN_A/RDQ55
RUM3_SPLLT_IN_A/RDQ46
PCLKC3_0/RDQ55
PCLKC2_0/RDQ46
PCLKT3_0/RDQ55
PCLKT2_0/RDQ46
VREF2_3/RDQ55
VREF1_3/RDQ55
Dual Function
Pinout Information
RDQS46
RDQ64
RDQ64
RDQ64
RDQ55
RDQ55
RDQ55
RDQ55
RDQ46
RDQ46
RDQ46
RDQ46
RDQ46
RDQ46
RDQ46
RDQ46
RDQ46
RDQ37
RDQ37
RDQ37
RDQ37
RDQ37
RDQ37
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
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