NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 154

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NUC130LE3CN

Manufacturer Part Number
NUC130LE3CN
Description
IC MCU 32BIT 128KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™ NUC100r
Datasheets

Specifications of NUC130LE3CN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUC130LE3CN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC130LE3CN
Manufacturer:
NUVOTON
Quantity:
20 000
5.4.4.7
mode. Furthermore, a user can write 0 into USB_ATTR[4] to turn off PHY under special
circumstances like suspend to save power.
There is 512 bytes SRAM in the controller and the 6 endpoints share this buffer. The user shall
configure each endpoint’s effective starting address in the buffer segmentation register before the
USB function active. The BUFFER CONTROL block is used to control each endpoint’s effective
starting address and its SRAM size is defined in the MXPLD register.
Figure 5-12 depicts the starting address for each endpoint according the content of BUFSEG and
MXPLD registers. If the BUFSEG0 is programmed as 0x08h and MXPLD0 is set as 0x40h, the
SRAM size of endpoint 0 is start from USB_BA+0x108h and end in USB_BA+0x148h. (Note: the
USB SRAM base is USB_BA+0x100h).
BUFSEG0 = 0x008
BUFSEG1 = 0x048
BUFSEG2 = 0x088
BUFSEG3 = 0x100
Buffer Control
NuMicro™ NUC130/NUC140 Technical Reference Manual
Setup Token Buffer: 8 bytes
EP0 SRAM Buffer: 64 bytes
EP1 SRAM Buffer: 64 bytes
EP2 SRAM Buffer
EP3 SRAM Buffer
USB SRAM Start Address
Figure 5-12 Endpoint SRAM Structure
- 154 -
EP0 SA = USB_BA + 0x0108h
MXPLD0 = 0x40
EP1 SA = USB_BA + 0x0148h
MXPLD1 = 0x40
EP2 SA = USB_BA + 0x0188h
EP3 SA = USB_BA + 0x0200h
USB SRAM = USB_BA + 0x0100h
Publication Release Date: June 14, 2011
Revision V2.01
Bytes
512

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