NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 303

• Manufacturer Part Number: NUC130LE3CN
• Description: IC MCU 32BIT 128KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC130LE3CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

DMA Control Register (DMACTL)
Register
SPI_DMA
Bits
[31:2]
[1]
[0]
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Offset
SPIx_BA+0x38
Descriptions
Reserved
RX_DMA_GO
TX_DMA_GO
30
22
14
6
R/W
R/W
29
21
13
5
Reserved
Reserved
Receive DMA Start
Set this bit to 1 will start the receive PDMA process. SPI controller will issue
request to PDMA controller automatically.
Hardware will clear this bit to 0 automatically after PDMA transfer done.
Transmit DMA Start
Set this bit to 1 will start the transmit PDMA process. SPI controller will issue
request to PDMA controller automatically.
If using PDMA mode to transfer data, remember not to set GO_BUSY bit of
SPI_CNTRL register. The DMA controller inside SPI controller will set it
automatically whenever necessary.
Hardware will clear this bit to 0 automatically after PDMA transfer done.
Note: In DMA mode, the burst mode and FIFO mode are not supported.
Description
SPI DMA Mode Control Register
28
20
12
4
- 303 -
Reserved
Reserved
Reserved
27
19
11
3
Publication Release Date: June 14, 2011
26
18
10
2
RX_DMA_GO TX_DMA_GO
25
17
9
1
Revision V2.01
Reset Value
0x0000_0000
24
16
8
0