NUC130LE3CN Nuvoton Technology Corporation of America, NUC130LE3CN Datasheet - Page 411

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NUC130LE3CN

Manufacturer Part Number
NUC130LE3CN
Description
IC MCU 32BIT 128KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™ NUC100r
Datasheets

Specifications of NUC130LE3CN

Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
NUC130LE3CN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC130LE3CN
Manufacturer:
NUVOTON
Quantity:
20 000
IFn Command Mask Register (CAN_IFn_CMASK)
The control bits of the IFn Command Mask Register specify the transfer direction and select
which of the IFn Message Buffer Registers are source or target of the data transfer.
Register
CAN_IFn_CMASK CAN0_BA+0x24/0x84 R/W
Bits
[31:8]
[7]
[6]
[5]
WR/RD
31
23
15
7
NuMicro™ NUC130/NUC140 Technical Reference Manual
Descriptions
Reserved
WR/RD
Mask
Arb
Offset
Mask
30
22
14
6
Reserved
There are reserved bits. These bits are always read as ‘0’ and must always be written
with ‘0’.
Write / Read
1 = Write: Transfer data from the selected Message Buffer Registers to the Message
0 = Read: Transfer data from the Message Object addressed by the Command Request
Access Mask Bits
Direction = Write
1 = Transfer Identifier Mask + MDir + MXtd to Message Object.
0: = Mask bits unchanged.
Direction = Read
1 = Transfer Identifier Mask + MDir + MXtd to IFn Message Buffer Register.
0 = Mask bits unchanged.
Access Arbitration Bits
Direction = Write
1 = Transfer Identifier + Dir + Xtd + MsgVal to Message Object
0 = Arbitration bits unchanged.
Direction = Read
1 = Transfer Identifier + Dir + Xtd + MsgVal to IFn Message Buffer Register.
0 = Arbitration bits unchanged.
Object addressed by the Command Request Register.
Register into the selected Message Buffer Registers.
Arb
29
21
13
5
R/W
Control
Description
IFn Command Mask Register
28
20
12
4
- 411 -
Reserved
Reserved
Reserved
ClrIntPnd
27
19
11
3
Publication Release Date: June 14, 2011
TxRqst/
NewDat
26
18
10
2
Data A
25
17
9
1
Revision V2.01
Reset Value
0x0000_0000
Data B
24
16
8
0

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