DSP-DEVKIT-2S60 Altera, DSP-DEVKIT-2S60 Datasheet - Page 20

• Manufacturer Part Number: DSP-DEVKIT-2S60
• Manufacturer: Altera

Specifications of DSP-DEVKIT-2S60

• Lead Free Status / Rohs Status: Not Compliant

Board Components
2–10
Stratix II Development Board
Figure 3
Figure 3. Pin-Out Diagram for the Dual Seven-Segment Display
A/D Converters
The Stratix II DSP development board has two 12-bit A/D converters that
produce samples at a maximum rate of 125 mega-samples per second
(MSPS). The A/D subsystem of the board has the following features:
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■
■
1
The clock signal that drives the A/D converters can originate from the
Stratix II device, the external clock input, or the on-board 100-MHz
oscillator. Jumper J3 controls which clock is used for ADC A and J4 is used
The data output format from each A/D converter to the Stratix II
device is in two’s complement format.
The circuit has a wideband, AC-coupled, differential input useful for
IF sampling. The analog inputs are transformer-coupled to the A/D
converter in order to create a balanced input. To maximize
performance, two transformers are used in series. The Analog
Devices data sheet for the AD9433 device describes the detailed
operation of this circuit.
Any required anti-aliasing filtering can be installed externally. If
needed, users can purchase in-line SMA filters from a variety of
manufacturers, such as Mini-Circuits (www.minicircuits.com).
shows the pin-outs for the seven-segment display.
The transformer-coupled AC circuit has a lower 3-dB frequency,
of approximately 1 MHz.
Reference Manual
HEX_0D
HEX_0G
HEX_0A
HEX_0DP
HEX_1G
HEX_1D
HEX_1A
Altera Corporation
HEX_1DP
August 2006