DSP-DEVKIT-2S60 Altera, DSP-DEVKIT-2S60 Datasheet - Page 59

• Manufacturer Part Number: DSP-DEVKIT-2S60
• Manufacturer: Altera

Specifications of DSP-DEVKIT-2S60

• Lead Free Status / Rohs Status: Not Compliant

Getting Started
Install or
Remove the
Active Heat Sink
Altera Corporation
August 2006
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To download a Quartus II-generated HEXOUT file to the flash memory
on the board, refer to the Nios II Flash Programmer User Guide included on
the DSP Development Kit, Stratix II Edition CD-ROM.
The Factory Design
When the Stratix II device is programmed with the factory design, LEDs
D5 through D8 behave as a binary counter that counts down to zero. This
is a power-up indication that the board is functional and the device was
successfully programmed with the factory design.
Along with the LED counter, the factory design includes two blocks of IP
generated by the Altera NCO Compiler. One of these oscillators is
running at 10 times the frequency of the other, but both of them have the
same amplitude, covering 13 bits of dynamic range. Two sine waves
generated by these blocks are added together and the output is converted
from a 2's complement representation into unsigned integer format. This
combined sine wave signal of 14-bits dynamic range is sent to a 14-bit
D/A converter.
When the analog output of the D/A converter is connected, via the
included SMA cable, with the analog input of one of the 12-bit A/D
converters, the A/D converter’s digital output is looped back to the
Stratix II device. The design converts this loopback input from 2's
complement format to unsigned integer format. The converted loopback
data is captured by an instance of the SignalTap
design for display and analysis.
For step-by-step instructions on how to use the factory design to test the
functionality of the board, refer to the DSP Development Kit, Stratix II
Edition Getting Started User Guide.
The DSP Development Kit, Stratix II Edition includes a heat sink and fan
combination, also known as an active heat sink. This active heat sink
maintains the Stratix II device within its thermal operating range,
independent of the design size, clock frequency, and operating
conditions, allowing you to evaluate larger high-speed designs in
hardware before completing the thermal analysis of your system.
Depending on the specific requirements of your application, this level of
cooling may not be necessary.
For further information, refer to AN 355: Stratix II Device System Power
Considerations.
Reference Manual
Stratix II Development Board
®
II logic analyzer in the
3–5