DSP-DEVKIT-2S60 Altera, DSP-DEVKIT-2S60 Datasheet - Page 21

• Manufacturer Part Number: DSP-DEVKIT-2S60
• Manufacturer: Altera

Specifications of DSP-DEVKIT-2S60

• Lead Free Status / Rohs Status: Not Compliant

Board Components & Interfaces
Altera Corporation
August 2006
to select the clock for ADC B.
clock signals. The selected clock will pass through a differential LVPECL
buffer before arriving at the clock input to both A/D converters
Table 10
Pins 1 and 2
Pins 3 and 4
Pins 5 and 6
Board reference
Device description
Voltage
Table 9. A/D Clock Source Settings
Table 10. A/D Converter Reference
J3, J4 Setting
lists reference information for the A/D converters.
Reference Manual
Item
Stratix II PLL circuitry
OSC or External input
clock positive
OSC or External input
clock negative
Table 9
Clock Source
u1, u2
12-bit, 125-msps a/d converter
3.3-v digital v
explains how to select these three
Stratix II Development Board
dd
adc_PLLCLK1,
adc_PLLCLK2
adc_CLK_IN1,
adc_CLK_IN2
adc_CLK_IN1_n,
adc_CLK_IN2_n
Description
, 5.0-v analog v
Signal Name
dd
2–11