AT32UC3A0128AU Atmel Corporation, AT32UC3A0128AU Datasheet - Page 485
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AT32UC3A0128AU
Manufacturer Part Number
AT32UC3A0128AU
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
6.AT32UC3A0128AU.pdf
(2 pages)
Specifications of AT32UC3A0128AU
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0128AU-U
Manufacturer:
ATMEL
Quantity:
4
- AT32UC3A0128 PDF datasheet
- AT32UC3A0128 PDF datasheet #2
- AT32UC3A0128 PDF datasheet #3
- AT32UC3A0128 PDF datasheet #4
- AT32UC3A0128 PDF datasheet #5
- AT32UC3A0128AU PDF datasheet #6
- Current page: 485 of 826
- Download datasheet (11Mb)
32058K AVR32-01/12
29.7.27
Register Name:
Access Type:
• IP: ARP request IP address
Written to define the least significant 16 bits of the target IP address that is matched to generate a Wake-on-LAN event. A
value of zero does not generate an event, even if this is matched by the received frame.
• MAG: Magic packet event enable
When set, magic packet events causes the wol output to be asserted.
• ARP: ARP request event enable
When set, ARP request events causes the wol output to be asserted.
• SA1: Specific address register 1 event enable
When set, specific address 1 events causes the wol output to be asserted.
• MTI: Multicast hash event enable
When set, multicast hash events causes the wol output to be asserted.
31
23
15
–
–
7
Wake-on-LAN Register
30
22
14
WOL
–
–
6
Read/Write
29
21
13
–
–
5
28
20
12
–
–
4
IP
IP
MTI
27
19
11
–
3
SA1
26
18
10
–
2
ARP
25
17
–
9
1
AT32UC3A
MAG
24
16
–
8
0
485
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