AT32UC3A0256 Atmel Corporation, AT32UC3A0256 Datasheet - Page 208

no-image

AT32UC3A0256

Manufacturer Part Number
AT32UC3A0256
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A0256

Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0256
Quantity:
2 000
Part Number:
AT32UC3A0256-ALUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A0256-ALUT
Manufacturer:
ATMEL
Quantity:
167
Part Number:
AT32UC3A0256-ALUT
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A0256-CTUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A0256-CTUT
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT32UC3A0256AU-ALUT
Manufacturer:
Atmel
Quantity:
10 000
32058K AVR32-01/12
23.8.2
Name:
Access Type:
0 = SPI is in Slave mode.
1 = SPI is in Master mode.
0 = Fixed Peripheral Select.
1 = Variable Peripheral Select.
0 = The chip selects are directly connected to a peripheral device.
1 = The four chip select lines are connected to a 4- to 16-bit decoder.
When PCSDEC equals one, up to 15 Chip Select signals can be generated with the four lines using an external 4- to 16-bit
decoder. The Chip Select Registers define the characteristics of the 15 chip selects according to the following rules:
0 = The SPI operates at MCK.
1 = The SPI operates at MCK/32.
0 = Mode fault detection is enabled.
1 = Mode fault detection is disabled.
0 = Local loopback path disabled.
1 = Local loopback path enabled.
LLB controls the local loopback on the data serializer for testing in Master Mode only. MISO is internally connected to
MOSI.
MSTR: Master/Slave Mode
PS: Peripheral Select
PCSDEC: Chip Select Decode
FDIV: Clock Selection
MODFDIS: Mode Fault Detection
LLB: Local Loopback Enable
LLB
CSR0 defines peripheral chip select signals 0 to 3.
CSR1 defines peripheral chip select signals 4 to 7.
CSR2 defines peripheral chip select signals 8 to 11.
CSR3 defines peripheral chip select signals 12 to 14.
31
23
15
7
SPI Mode Register
30
22
14
6
29
21
13
5
MR
Read/Write
MODFDIS
28
20
12
4
DLYBCS
FDIV
27
19
11
3
PCSDEC
26
18
10
2
PCS
PS
25
17
9
1
AT32UC3A
MSTR
24
16
8
0
208

Related parts for AT32UC3A0256