AT32UC3A0256 Atmel Corporation, AT32UC3A0256 Datasheet - Page 407
AT32UC3A0256
Manufacturer Part Number
AT32UC3A0256
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(98 pages)
2.AT32UC3A0128.pdf
(826 pages)
3.AT32UC3A0128.pdf
(377 pages)
4.AT32UC3A0128.pdf
(33 pages)
5.AT32UC3A0128.pdf
(159 pages)
Specifications of AT32UC3A0256
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3A0256-ALUT
Manufacturer:
ATMEL
Quantity:
167
- AT32UC3A0128 PDF datasheet
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- AT32UC3A0128 PDF datasheet #3
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32058K AVR32-01/12
27.7.4
Register Name:
Access Type:
Offset:
Reset Value:
• PS: Page Size
If page mode is enabled, this field indicates the size of the page in bytes.
Table 27-8.
• PMEN: Page Mode Enabled
1: Asynchronous burst read in page mode is applied on the corresponding chip select.
0: Standard read is applied.
• TDF_MODE: TDF Optimization
1: TDF optimization is enabled.
0: TDF optimization is disabled.
• TDF_CYCLES: Data Float Time
This field gives the integer number of clock cycles required by the external device to release the data after the rising edge
of the read controlling signal. The SMC always provide one full cycle of bus turnaround after the TDF_CYCLES period. The
– The number of TDF wait states is optimized using the setup period of the next read/write access.
– The number of TDF wait states is inserted before the next access begins.
31
23
15
–
–
–
7
–
MODE Register
0
0
1
1
Page size settings.
30
22
14
MODE[0..3]
Read/Write
0x10 x CS_number + 0x0C
–
–
–
–
6
–
PS
0
1
0
1
29
21
13
–
5
EXNW_MODE
DBW
PS
TDF_MODE
Page Size
4-byte page
8-byte page
16-byte page
32-byte page
28
20
12
4
27
19
11
–
–
3
–
26
18
10
–
–
2
–
TDF_CYCLES
WRITE_MOD
25
17
–
9
–
1
E
AT32UC3A
READ_MODE
PMEN
BAT
24
16
8
0
407
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