AT32UC3A0256 Atmel Corporation, AT32UC3A0256 Datasheet - Page 426

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AT32UC3A0256

Manufacturer Part Number
AT32UC3A0256
Description
Manufacturer
Atmel Corporation

Specifications of AT32UC3A0256

Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
109
Ext Interrupts
109
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
1
Uart
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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32058K AVR32-01/12
28.8.2
Register Name:
Access Type:
Reset Value:
This 12-bit field is loaded into a timer that generates the refresh pulse. Each time the refresh pulse is generated, a refresh
burst is initiated. The value to be loaded depends on the SDRAMC clock frequency (MCK: Master Clock), the refresh rate
of the SDRAM device and the refresh burst length where 15.6 µs per row is a typical value for a burst of length one.
To refresh the SDRAM device, this 12-bit field must be written. If this condition is not satisfied, no refresh command is
issued and no refresh of the SDRAM device is carried out.
COUNT: SDRAMC Refresh Timer Count
31
23
15
7
SDRAMC Refresh Timer Register
30
22
14
6
29
21
13
5
TR
Read/Write
0x00000000
28
20
12
4
COUNT
27
19
11
3
26
18
10
2
COUNT
25
17
9
1
AT32UC3A
24
16
8
0
426

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