AT32UC3B0128 Atmel Corporation, AT32UC3B0128 Datasheet - Page 620
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AT32UC3B0128
Manufacturer Part Number
AT32UC3B0128
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3B0128.pdf
(684 pages)
5.AT32UC3B0128.pdf
(107 pages)
Specifications of AT32UC3B0128
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
60 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
44
Ext Interrupts
44
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
4
Twi (i2c)
1
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0-3.6 or (1.65-1.95+3.0-3.6)
Operating Voltage (vcc)
3.0-3.6 or (1.65-1.95+3.0-3.6)
Fpu
No
Mpu / Mmu
Yes / No
Timers
10
Output Compare Channels
16
Input Capture Channels
6
Pwm Channels
13
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Manufacturer
Quantity
Price
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Company:
Part Number:
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ATMEL
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Part Number:
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Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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28.8
Table 28-20. Channel Conversion Time and ADC Clock
Notes:
Table 28-21. External Voltage Reference Input
Note:
Table 28-22. Analog Inputs
Table 28-23. Transfer Characteristics in 8-bit Mode
32059L–AVR32–01/2012
Parameter
ADC Clock Frequency
ADC Clock Frequency
Startup Time
Track and Hold Acquisition Time
Track and Hold Input Resistor
Track and Hold Capacitor
Conversion Time
Throughput Rate
Parameter
ADVREF Input Voltage Range
ADVREF Average Current
Current Consumption on VDDANA
Parameter
Input Voltage Range
Input Leakage Current
Input Capacitance
Parameter
Resolution
Absolute Accuracy
Integral Non-linearity
ADC Characteristics
1. Corresponds to 13 clock cycles: 3 clock cycles for track and hold acquisition time and 10 clock cycles for conversion.
2. Corresponds to 15 clock cycles: 5 clock cycles for track and hold acquisition time and 10 clock cycles for conversion.
1. ADVREF should be connected to GND to avoid extra consumption in case ADC is not used.
Conditions
10-bit resolution mode
8-bit resolution mode
Return from Idle Mode
ADC Clock = 5 MHz
ADC Clock = 8 MHz
ADC Clock = 5 MHz
ADC Clock = 8 MHz
Conditions
(1)
On 13 samples with ADC Clock = 5 MHz
On 13 samples with ADC Clock = 5 MHz
Conditions
Conditions
ADC Clock = 5 MHz
ADC Clock = 8 MHz
ADC Clock = 5 MHz
ADC Clock = 8 MHz
Min.
Min.
Min.
Min.
600
2.6
0
Typ.
Typ.
Typ.
Typ.
0.35
350
200
0.5
12
7
8
VDDANA
V
384
533
Max.
Max.
Max.
ADVREF
Max.
1.25
250
0.8
1.5
0.5
1.0
20
5
8
2
1
1
(1)
(2)
kSPS
kSPS
MHz
MHz
Unit
Unit
Unit
Unit
LSB
LSB
LSB
LSB
mA
µA
pF
µA
pF
Bit
µs
ns
µs
µs
Ω
V
V
620
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