AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 251

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14.8
32117C–AVR-08/11
Module Configuration
The specific configuration for each PEVC instance is listed in the following tables. The module
bus clocks listed here are connected to the system bus clocks. Refer to the Power Manager
chapter for details.
Table 14-3.
Table 14-4.
Table 14-5.
The BUSY0[21:16] field will always be read as 0x3F.
The PEVC routes events from event generator to trigger an action in the event user. The follow-
ing tables defines the corresponding input event generator in EVMx registers and if an event
shaper is implemented for this generator.
Table 14-6.
Feature
Number of Generators
Number of Event Shapers
Number of Channels / Users
Module name
PEVC
Register
BUSY0
VERSION
PARAMETER
Event Number (EVMx)
[15:0]
16
17
18
19
20
21
22
23
24
25
Module Configuration
Module Clock Name
Register Reset Values
PEVC event numbers
Clock name
CLK_PEVC
Reset Value
0x0000FFFF
0x00000100
Refer to
Table 14-3
Event Generator - Event source
PAD_EVT[15:0] - change on input
pins
the generic clock GCLK7
the generic clock GCLK8
TC0 - A0 rising edge
TC0 - A1 rising edge
TC0 - A2 rising edge
TC0 - B0 rising edge
TC0 - B1 rising edge
TC0 - B2 rising edge
ACIFA0 - event 0
ACIFA0 - event 1
Description
HSB clock
Parameter
EVIN
EVS
TRIGOUT
PEVC
34
24
22
Event Shaper
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
AT32UC3C
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