AT32UC3C1512C Atmel Corporation, AT32UC3C1512C Datasheet - Page 908

• Manufacturer Part Number: AT32UC3C1512C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C1512C

• Flash (kbytes): 512 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 81
• Ext Interrupts: 100
• Usb Transceiver: 1
• Quadrature Decoder Channels: 2
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 7
• Twi (i2c): 3
• Uart: 5
• Can: 2
• Lin: 5
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 4
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 22
• Input Capture Channels: 12
• Pwm Channels: 19
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

• STOI: Suspend Time-Out Interrupt
• HNPERRI: HNP Error Interrupt
• ROLEEXI: Role Exchange Interrupt
• BCERRI: B-Connection Error Interrupt
• VBERRI: VBUS Error Interrupt
• SRPI: SRP Interrupt
• VBUSTI: VBUS Transition Interrupt
• IDTI: ID Transition Interrupt
32117C–AVR-08/11
This bit is cleared when the USBSTACLR.STOIC bit is written to one.
This bit is set when a time-out error (more than 200ms) has been detected after a suspend. This triggers a USB interrupt if
STOE is one.
This bit should only be used in host mode.
This bit is cleared when the USBSTACLR.HNPERRIC bit is written to one.
This bit is set when an error has been detected during a HNP negotiation. This triggers a USB interrupt if HNPERRE is one.
This bit should only be used in device mode.
This bit is cleared when the USBSTACLR.ROLEEXIC bit is written to one.
This bit is set when the USBC has successfully switched its mode because of an HNP negotiation (host to device or device to
host). This triggers a USB interrupt if ROLEEXE is one.
This bit is cleared when the USBSTACLR.BCERRIC bit is written to one.
This bit is set when an error occurs during the B-connection. This triggers a USB interrupt if BCERRE is one.
This bit should only be used in host mode.
This bit is cleared when the USBSTACLR.VBERRIC bit is written to one.
This bit is set when a VBUS drop has been detected. This triggers a USB interrupt if VBERRE is one.
This bit should only be used in host mode.
This bit is cleared when the USBSTACLR.SRPIC bit is written to one.
This bit is set when an SRP has been detected. This triggers a USB interrupt if SRPE is one.
This bit should only be used in host mode.
This bit is cleared when the USBSTACLR.VBUSTIC bit is written to one.
This bit is set when a transition (high to low, low to high) has been detected on the USB_VBUS pad. This triggers a USB
interrupt if VBUSTE is one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
This bit is cleared when the USBSTACLR.IDTIC bit is written to one.
This bit is set when a transition (high to low, low to high) has been detected on the USB_ID input pin. This triggers a USB
interrupt if IDTE is one.
This interrupt is generated even if the clock is frozen by the FRZCLK bit.
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