AT90PWM216 Atmel Corporation, AT90PWM216 Datasheet - Page 128
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AT90PWM216
Manufacturer Part Number
AT90PWM216
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM216
Flash (kbytes)
16 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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15.10.3
7710F–AVR–09/11
Timer/Counter1 Control Register C – TCCR1C
When the ICRn is used as TOP value (see description of the WGMn3:0 bits located in the
TCCRnA and the TCCRnB Register), the ICPn is disconnected and consequently the Input Cap-
ture function is disabled.
• Bit 5 – Reserved Bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be
written to zero when TCCRnB is written.
• Bit 4:3 – WGMn3:2: Waveform Generation Mode
See TCCRnA Register description.
• Bit 2:0 – CSn2:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
15-10
Table 15-6.
If external pin modes are used for the Timer/Countern, transitions on the Tn pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
• Bit 7 – FOCnA: Force Output Compare for Channel A
• Bit 6 – FOCnB: Force Output Compare for Channel B
The FOCnA/FOCnB bits are only active when the WGMn3:0 bits specifies a non-PWM mode.
However, for ensuring compatibility with future devices, these bits must be set to zero when
TCCRnA is written when operating in a PWM mode. When writing a logical one to the
FOCnA/FOCnB bit, an immediate compare match is forced on the Waveform Generation unit.
The OCnA/OCnB output is changed according to its COMnx1:0 bits setting. Note that the
FOCnA/FOCnB bits are implemented as strobes. Therefore it is the value present in the
COMnx1:0 bits that determine the effect of the forced compare.
Bit
Read/Write
Initial Value
CSn2
0
0
0
0
1
1
1
1
and
Figure
CSn1
0
0
1
1
0
0
1
1
Clock Select Bit Description
FOC1A
R/W
7
0
15-11.
CSn0
FOC1B
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (Timer/Counter stopped).
clk
clk
clk
clk
clk
External clock source on Tn pin. Clock on falling edge.
External clock source on Tn pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R
5
–
0
/1 (No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R
4
–
0
R
3
–
0
AT90PWM216/316
R
2
–
0
R
1
–
0
R
0
–
0
TCCR1C
Figure
128
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