AT90PWM216 Atmel Corporation, AT90PWM216 Datasheet - Page 198
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
AT90PWM216
Manufacturer Part Number
AT90PWM216
Description
Manufacturer
Atmel Corporation
Specifications of AT90PWM216
Flash (kbytes)
16 Kbytes
Pin Count
24
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
19
Ext Interrupts
4
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 105
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
1
Pwm Channels
7
32khz Rtc
No
Calibrated Rc Oscillator
Yes
- Current page: 198 of 361
- Download datasheet (5Mb)
18.7.3
18.7.4
7710F–AVR–09/11
Receive Complete Flag and Interrupt
Receiver Error Flags
The receive function example reads all the I/O Registers into the Register File before any com-
putation is done. This gives an optimal receive buffer utilization since the buffer location read will
be free to accept new data as early as possible.
The USART Receiver has one flag that indicates the Receiver state.
The Receive Complete (RXC) flag indicates if there are unread data present in the receive buf-
fer. This flag is one when unread data exist in the receive buffer, and zero when the receive
buffer is empty (i.e., does not contain any unread data). If the Receiver is disabled (RXEN = 0),
the receive buffer will be flushed and consequently the RXC bit will become zero.
When the Receive Complete Interrupt Enable (RXCIE) in UCSRB is set, the USART Receive
Complete interrupt will be executed as long as the RXC flag is set (provided that global inter-
rupts are enabled). When interrupt-driven data reception is used, the receive complete routine
must read the received data from UDR in order to clear the RXC flag, otherwise a new interrupt
will occur once the interrupt routine terminates.
The USART Receiver has three error flags: Frame Error (FE), Data OverRun (DOR) and Parity
Error (UPE). All can be accessed by reading UCSRA. Common for the error flags is that they are
located in the receive buffer together with the frame for which they indicate the error status. Due
to the buffering of the error flags, the UCSRA must be read before the receive buffer (UDR),
since reading the UDR I/O location changes the buffer read location. Another equality for the
error flags is that they can not be altered by software doing a write to the flag location. However,
all flags must be set to zero when the UCSRA is written for upward compatibility of future
USART implementations. None of the error flags can generate interrupts.
The Frame Error (FE) flag indicates the state of the first stop bit of the next readable frame
stored in the receive buffer. The FE flag is zero when the stop bit was correctly read (as one),
and the FE flag will be one when the stop bit was incorrect (zero). This flag can be used for
detecting out-of-sync conditions, detecting break conditions and protocol handling. The FE flag
is not affected by the setting of the USBS bit in UCSRC since the Receiver ignores all, except for
the first, stop bits. For compatibility with future devices, always set this bit to zero when writing to
UCSRA.
The Data OverRun (DOR) flag indicates data loss due to a receiver buffer full condition. A Data
OverRun occurs when the receive buffer is full (two characters), it is a new character waiting in
the Receive Shift Register, and a new start bit is detected. If the DOR flag is set there was one
or more serial frame lost between the frame last read from UDR, and the next frame read from
UDR. For compatibility with future devices, always write this bit to zero when writing to UCSRA.
The DOR flag is cleared when the frame received was successfully moved from the Shift Regis-
ter to the receive buffer.
The following example (See Figure 18-5.) represents a Data OverRun condition. As the receive
buffer is full with CH1 and CH2, CH3 is lost. When a Data OverRun condition is detected, the
OverRun error is memorized. When the two characters CH1 and CH2 are read from the receive
buffer, the DOR bit is set (and not before) and RxC remains set to warn the application about the
overrun error.
AT90PWM216/316
198
Related parts for AT90PWM216
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![AT90-1107TR](/images/manufacturer_photos/0/4/405/m_a-com_technology_solutions_tmb.jpg)
Part Number:
Description:
Digital Attenuator 32-Pin FQFP T/R
Manufacturer:
M/A-Com Technology Solutions
Datasheet:
![AT90-1106](/images/manufacturer_photos/0/4/405/m_a-com_technology_solutions_tmb.jpg)
Part Number:
Description:
MLP DIGITAL ATTENUATOR
Manufacturer:
M/A-Com Technology Solutions
![AT90-1233](/images/manufacturer_photos/0/4/405/m_a-com_technology_solutions_tmb.jpg)
Part Number:
Description:
Digital Attenuator 32-Pin FQFP
Manufacturer:
M/A-Com Technology Solutions
Datasheet:
![AT90-1233TR](/images/manufacturer_photos/0/4/405/m_a-com_technology_solutions_tmb.jpg)
Part Number:
Description:
Digital Attenuator 32-Pin FQFP T/R
Manufacturer:
M/A-Com Technology Solutions
Datasheet:
![AT90-0263](/images/manufacturer_photos/0/4/405/m_a-com_technology_solutions_tmb.jpg)
Part Number:
Description:
MLP DIGITAL ATTENUATOR
Manufacturer:
M/A-Com Technology Solutions
![AT90-0106](/images/manufacturer_photos/0/6/687/tyco_electronics_tmb.jpg)
Part Number:
Description:
Digital Attenuator, 50 Db, 6-bit, Ttl Driver, Dc-2.4 Ghz
Manufacturer:
Tyco Electronics
Datasheet:
![AT90-0107](/images/manufacturer_photos/0/6/687/tyco_electronics_tmb.jpg)
Part Number:
Description:
Digital Attenuator, 31.5 Db, 6-bit, Ttl Driver, Dc-4.0 Ghz
Manufacturer:
Tyco Electronics
Datasheet:
![AT90-1107](/images/manufacturer_photos/0/6/687/tyco_electronics_tmb.jpg)
Part Number:
Description:
Digital Attenuator, 31.5 Db, 6-bit, Ttl Driver, Dc-4.0 Ghz
Manufacturer:
Tyco Electronics
Datasheet:
![AT90-1263](/images/manufacturer_photos/0/6/687/tyco_electronics_tmb.jpg)
Part Number:
Description:
Digital Attenuator, 31db, 5-bit, Ttl Driver Dc - 3.0 Ghz
Manufacturer:
Tyco Electronics
Datasheet:
![AT90-1283](/images/manufacturer_photos/0/6/687/tyco_electronics_tmb.jpg)
Part Number:
Description:
Digital Attenuator, 15.5 Db, 5-bit, Ttl Driver, Dc-3.5 Ghz
Manufacturer:
Tyco Electronics
Datasheet:
![U641B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
INTERVAL AND WIPE/WASH WIPER CONTROL IC WITH DELAY
Manufacturer:
ATMEL Corporation
Datasheet:
![U4082B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
Low-Voltage Voice-Switched IC for Hands-Free Operation
Manufacturer:
ATMEL Corporation
Datasheet:
![U4089B](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
MONOLITHIC INTEGRATED FEATUREPHONE CIRCUIT
Manufacturer:
ATMEL Corporation
Datasheet:
![U4255BM-M](/images/manufacturer_photos/0/0/79/atmel_corporation_tmb.jpg)
Part Number:
Description:
AM-FM Receiver IC U4255BM-M
Manufacturer:
ATMEL Corporation
Datasheet: