AT90PWM216 Atmel Corporation, AT90PWM216 Datasheet - Page 191

• Manufacturer Part Number: AT90PWM216
• Manufacturer: Atmel Corporation

Specifications of AT90PWM216

• Flash (kbytes): 16 Kbytes
• Pin Count: 24
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 19
• Ext Interrupts: 4
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 1
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 105
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 12
• Input Capture Channels: 1
• Pwm Channels: 7
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

18.4.2
18.5
7710F–AVR–09/11
USART Initialization
Parity Bit Calculation
Figure 18-4. Frame Formats
be
The frame format used by the USART is set by the UCSZ2:0, UPM1:0 and USBS bits in UCSRB
and UCSRC. The Receiver and Transmitter use the same setting. Note that changing the setting
of any of these bits will corrupt all ongoing communication for both the Receiver and Transmitter.
The USART Character SiZe (UCSZ2:0) bits select the number of data bits in the frame. The
USART Parity mode (UPM1:0) bits enable and set the type of parity bit. The selection between
one or two stop bits is done by the USART Stop Bit Select (USBS) bit. The Receiver ignores the
second stop bit. An FE (Frame Error) will therefore only be detected in the cases where the first
stop bit is zero.
The parity bit is calculated by doing an exclusive-or of all the data bits. If odd parity is used, the
result of the exclusive or is inverted. The relation between the parity bit and data bits is as
follows:
If used, the parity bit is located between the last data bit and first stop bit of a serial frame.
The USART has to be initialized before any communication can take place.
The configuration between the USART or EUSART mode should be done before any other
configuration.
The initialization process normally consists of setting the baud rate, setting frame format and
enabling the Transmitter or the Receiver depending on the usage.
For interrupt driven USART operation, the Global Interrupt Flag should be cleared (and inter-
rupts globally disabled) when doing the initialization.
St
(n)
P
Sp
IDLE
P
P
d
even
odd
n
(IDLE)
Start bit, always low.
Data bits (0 to 8).
Parity bit. Can be odd or even.
Stop bit, always high.
No transfers on the communication line (RxD or TxD). An IDLE line must
high.
Parity bit using even parity
Parity bit using odd parity
Data bit n of the character
P
St
P
even
odd
0
=
=
d
d
1
n 1
n 1
–
–
2
⊕
⊕
…
…
3
⊕
⊕
d
d
4
3
3
FRAME
⊕
⊕
[5]
d
d
2
2
⊕
⊕
[6]
d
d
1
1
[7]
⊕
⊕
AT90PWM216/316
d
d
0
0
[8]
⊕
⊕
0
1
[P]
Sp1 [Sp2]
(St / IDLE)
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