ATmega1280R212 Atmel Corporation, ATmega1280R212 Datasheet - Page 246

• Manufacturer Part Number: ATmega1280R212
• Manufacturer: Atmel Corporation

Specifications of ATmega1280R212

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 86
• Spi: 5
• Twi (i2c): 1
• Uart: 4
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

24.5
2549N–AVR–05/11
Overview of the TWI Module
Figure 24-8. Arbitration Between Two Masters
Note that arbitration is not allowed between:
•
•
•
It is the user software’s responsibility to ensure that these illegal arbitration conditions never
occur. This implies that in multi-master systems, all data transfers must use the same composi-
tion of SLA+R/W and data packets. In other words: All transmissions must contain the same
number of data packets, otherwise the result of the arbitration is undefined.
The TWI module is comprised of several submodules, as shown in
registers drawn in a thick line are accessible through the AVR data bus.
A REPEATED START condition and a data bit
A STOP condition and a data bit
A REPEATED START and a STOP condition
Synchronized
SCL Line
SDA from
SDA from
Master A
Master B
SDA Line
START
ATmega640/1280/1281/2560/2561
Arbitration, SDA
Master A Loses
Figure 24-9 on page
A
SDA
247. All
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