ATmega1280R212 Atmel Corporation, ATmega1280R212 Datasheet - Page 318

• Manufacturer Part Number: ATmega1280R212
• Manufacturer: Atmel Corporation

Specifications of ATmega1280R212

• Flash (kbytes): 128 Kbytes
• Max. Operating Frequency: 16 MHz
• Max I/o Pins: 86
• Spi: 5
• Twi (i2c): 1
• Uart: 4
• Adc Channels: 16
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Crypto Engine: AES
• Sram (kbytes): 8
• Eeprom (bytes): 4096
• Operating Voltage (vcc): 1.8 to 3.6
• Timers: 6
• Frequency Band: 700/800/900MHz
• Max Data Rate (mb/s): 1
• Antenna Diversity: No
• External Pa Control: Yes
• Power Output (dbm): 10
• Receiver Sensitivity (dbm): -110
• Receive Current Consumption (ma): 9.0
• Transmit Current Consumption (ma): 18 at 5dBm
• Link Budget (dbm): 120

29.3.1
29.3.2
Table 29-1.
2549N–AVR–05/11
Address during the Programming?
Which Section does the Z-pointer
RWW – Read-While-Write Section
NRWW – No Read-While-Write Section
NRWW Section
RWW Section
Read-While-Write Features
divided into two fixed sections, the Read-While-Write (RWW) section and the No Read-While-
Write (NRWW) section. The limit between the RWW- and NRWW sections is given in
1
•
•
Note that the user software can never read any code that is located inside the RWW section dur-
ing a Boot Loader software operation. The syntax “Read-While-Write section” refers to which
section that is being programmed (erased or written), not which section that actually is being
read during a Boot Loader software update.
If a Boot Loader software update is programming a page inside the RWW section, it is possible
to read code from the Flash, but only code that is located in the NRWW section. During an on-
going programming, the software must ensure that the RWW section never is being read. If the
user software is trying to read code that is located inside the RWW section (that is, by load pro-
gram memory, call, or jump instructions or an interrupt) during programming, the software might
end up in an unknown state. To avoid this, the interrupts should either be disabled or moved to
the Boot Loader section. The Boot Loader section is always located in the NRWW section. The
RWW Section Busy bit (RWWSB) in the Store Program Memory Control and Status Register
(SPMCSR) will be read as logical one as long as the RWW section is blocked for reading. After
a programming is completed, the RWWSB must be cleared by software before reading code
located in the RWW section.
ister” on page 332.
The code located in the NRWW section can be read when the Boot Loader software is updating
a page in the RWW section. When the Boot Loader code updates the NRWW section, the CPU
is halted during the entire Page Erase or Page Write operation.
and
When erasing or writing a page located inside the RWW section, the NRWW section can be
read during the operation
When erasing or writing a page located inside the NRWW section, the CPU is halted during
the entire operation
Figure 29-1 on page
Read during Programming?
Which Section can be
for details on how to clear RWWSB.
NRWW Section
None
319. The main difference between the two sections is:
See “SPMCSR – Store Program Memory Control and Status Reg-
ATmega640/1280/1281/2560/2561
CPU Halted?
Yes
No
Read-While-Write
Supported?
Yes
No
Table 29-
318