ATmega1280R212 Atmel Corporation, ATmega1280R212 Datasheet - Page 60

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ATmega1280R212

Manufacturer Part Number
ATmega1280R212
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega1280R212

Flash (kbytes)
128 Kbytes
Max. Operating Frequency
16 MHz
Max I/o Pins
86
Spi
5
Twi (i2c)
1
Uart
4
Adc Channels
16
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Crypto Engine
AES
Sram (kbytes)
8
Eeprom (bytes)
4096
Operating Voltage (vcc)
1.8 to 3.6
Timers
6
Frequency Band
700/800/900MHz
Max Data Rate (mb/s)
1
Antenna Diversity
No
External Pa Control
Yes
Power Output (dbm)
10
Receiver Sensitivity (dbm)
-110
Receive Current Consumption (ma)
9.0
Transmit Current Consumption (ma)
18 at 5dBm
Link Budget (dbm)
120
12.2.1
2549N–AVR–05/11
Power-on Reset
Figure 12-1. Reset Logic
A Power-on Reset (POR) pulse is generated by an On-chip detection circuit. The detection level
is defined in
V
well as to detect a failure in supply voltage.
A Power-on Reset (POR) circuit ensures that the device is reset from Power-on. Reaching the
Power-on Reset threshold voltage invokes the delay counter, which determines how long the
device is kept in RESET after V
when V
Figure 12-2. MCU Start-up, RESET Tied to V
CC
is below the detection level. The POR circuit can be used to trigger the start-up Reset, as
INTERNAL
TIME-OUT
BODLEVEL [2..0]
CC
RESET
RESET
V
decreases below the detection level.
CC
“System and Reset Characteristics” on page
Pull-up Resistor
JTAG Reset
Register
FILTER
SPIKE
V
V
POT
RST
CC
ATmega640/1280/1281/2560/2561
t
TOUT
CKSEL[3:0]
rise. The RESET signal is activated again, without any delay,
Power-on Reset
Reset Circuit
SUT[1:0]
Brown-out
Watchdog
Oscillator
Generator
Circuit
Clock
CK
CC
Register (MCUSR)
MCU Status
DATA BUS
Delay Counters
372. The POR is activated whenever
TIMEOUT
60

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