ATmega168 Atmel Corporation, ATmega168 Datasheet - Page 94
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATmega168
Manufacturer Part Number
ATmega168
Description
Manufacturer
Atmel Corporation
Specifications of ATmega168
Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA168
Manufacturer:
AVAILINK
Quantity:
1 590
Company:
Part Number:
ATmega168-15AD
Manufacturer:
VISHAY
Quantity:
15 600
Part Number:
ATmega168-15AT1
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega168-15MT
Manufacturer:
ATMEL
Quantity:
686
Part Number:
ATmega168-15MT
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega168-15MT1
Manufacturer:
ATMEL
Quantity:
372
Part Number:
ATmega168-15MZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega168-20AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
15.6.1
15.7
2545T–AVR–05/11
Modes of operation
Compare output mode and waveform generation
Figure 15-4. Compare match output unit, schematic.
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before the out-
put is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of
operation.
The Waveform Generator uses the COM0x1:0 bits differently in Normal, CTC, and PWM modes.
For all modes, setting the COM0x1:0 = 0 tells the Waveform Generator that no action on the
OC0x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
A change of the COM0x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC0x strobe bits.
The mode of operation, that is, the behavior of the Timer/Counter and the Output Compare pins,
is defined by the combination of the Waveform Generation mode (WGM02:0) and Compare Out-
put mode (COM0x1:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM0x1:0 bits control whether the PWM out-
put generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes
the COM0x1:0 bits control whether the output should be set, cleared, or toggled at a compare
match
For detailed timing information refer to
101, and for phase correct PWM refer to
(See “Compare match output unit” on page
See “Register description” on page 101.
COMnx1
COMnx0
FOCn
clk
I/O
Table 15-2 on page
Waveform
generator
“Timer/counter timing diagrams” on page
D
D
D
Table 15-4 on page
PORT
101. For fast PWM mode, refer to
DDR
OCnx
93.).
Q
Q
Q
ATmega48/88/168
1
0
102.
99.
OCnx
pin
Table 15-3 on
94