ATmega168A Atmel Corporation, ATmega168A Datasheet - Page 205

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ATmega168A

Manufacturer Part Number
ATmega168A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168A

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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20.11.5
8271D–AVR–05/11
UBRRnL and UBRRnH – USART Baud Rate Registers
Table 20-11. UCPOLn Bit Settings
• Bit 15:12 – Reserved
These bits are reserved for future use. For compatibility with future devices, these bit must be
written to zero when UBRRnH is written.
• Bit 11:0 – UBRR[11:0]: USART Baud Rate Register
This is a 12-bit register which contains the USART baud rate. The UBRRnH contains the four
most significant bits, and the UBRRnL contains the eight least significant bits of the USART
baud rate. Ongoing transmissions by the Transmitter and Receiver will be corrupted if the baud
rate is changed. Writing UBRRnL will trigger an immediate update of the baud rate prescaler.
Bit
Read/Write
Initial Value
UCPOLn
0
1
Transmitted Data Changed (Output of
TxDn Pin)
Rising XCKn Edge
Falling XCKn Edge
R/W
15
R
7
0
0
ATmega48A/PA/88A/PA/168A/PA/328/P
R/W
14
R
6
0
0
R/W
13
R
5
0
0
R/W
12
R
4
0
0
UBRRn[7:0]
R/W
R/W
11
3
0
0
Received Data Sampled (Input on RxDn
Pin)
Falling XCKn Edge
Rising XCKn Edge
R/W
R/W
10
2
0
0
UBRRn[11:8]
R/W
R/W
9
1
0
0
R/W
R/W
8
0
0
0
UBRRnH
UBRRnL
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