ATmega168A Atmel Corporation, ATmega168A Datasheet - Page 40

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ATmega168A

Manufacturer Part Number
ATmega168A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega168A

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
23
Ext Interrupts
24
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
1
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
6
Input Capture Channels
1
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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10. Power Management and Sleep Modes
10.1
Table 10-1.
Notes:
8271D–AVR–05/11
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Power-save
Standby
Extended
Standby
Sleep Modes
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT1 and INT0, only level interrupt.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
F i g u r e 9 - 1 o n p a g e 2 7
ATmega48A/PA/88A/PA/168A/PA/328/P, and their distribution. The figure is helpful in selecting
an appropriate sleep mode.
BOD disable ability.
Note:
To enter any of the six sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, Standby, or Extended
Standby) will be activated by the SLEEP instruction. See
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
”BOD Disable(1)” on page 41
X
1. BOD disable is only available for ATmega48PA/88PA/168PA/328P.
X
X
X
X
X
X
(2)
(1)
ATmega48A/PA/88A/PA/168A/PA/328/P
Oscillators
X
X
X
X
Table 10-1
X
X
X
X
(2)
(2)
(2)
(2)
for more details.
p r e s e n t s t h e d i f f e r e n t c l o c k s y s t e m s i n t h e
shows the different sleep modes, their wake up sources
X
X
X
X
X
X
(3)
(3)
(3)
(3)
(3)
X
X
X
X
X
X
Wake-up Sources
Table 10-2 on page 45
X
X
X
X
(2)
X
X
X
X
for a summary.
X
X
X
X
X
X
X
X
X
X
X
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