ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 114

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ATmega32A

Manufacturer Part Number
ATmega32A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega32A

Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Table 16-5.
Note:
16.10.2
8155C–AVR–02/11
Mode
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
1. The CTC1 and PWM11:0 bit definition names are obsolete. Use the
WGM13
TCCR1B – Timer/Counter1 Control Register B
location of these bits are compatible with previous versions of the timer.
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Waveform Generation Mode Bit Description
WGM12
(CTC1)
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TCCR1A is written when operating in a PWM mode. When writing a logical one to the
FOC1A/FOC1B bit, an immediate compare match is forced on the Waveform Generation unit.
The OC1A/OC1B output is changed according to its COM1x1:0 bits setting. Note that the
FOC1A/FOC1B bits are implemented as strobes. Therefore it is the value present in the
COM1x1:0 bits that determine the effect of the forced compare.
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer
on Compare match (CTC) mode using OCR1A as TOP.
The FOC1A/FOC1B bits are always read as zero.
• Bit 1:0 – WGM11:0: Waveform Generation Mode
Combined with the WGM13:2 bits found in the TCCR1B Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
of Pulse Width Modulation (PWM) modes.
Bit
Read/Write
Initial Value
(PWM11)
WGM11
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
(PWM10)
WGM10
ICNC1
R/W
7
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
ICES1
R/W
Timer/Counter Mode of
Operation
Normal
PWM, Phase Correct, 8-bit
PWM, Phase Correct, 9-bit
PWM, Phase Correct, 10-bit
CTC
Fast PWM, 8-bit
Fast PWM, 9-bit
Fast PWM, 10-bit
PWM, Phase and Frequency Correct
PWM, Phase and Frequency Correct
PWM, Phase Correct
PWM, Phase Correct
CTC
Reserved
Fast PWM
Fast PWM
6
0
(1)
Table
R
5
0
16-5. Modes of operation supported by the Timer/Counter
WGM13
(See “Modes of Operation” on page
R/W
4
0
WGM
WGM12
12:0 definitions. However, the functionality and
R/W
3
0
TOP
0xFFFF
0x00FF
0x01FF
0x03FF
OCR1A
0x00FF
0x01FF
0x03FF
ICR1
OCR1A
ICR1
OCR1A
ICR1
ICR1
OCR1A
CS12
R/W
2
0
Update of
OCR1
TOP
BOTTOM
Immediate
TOP
TOP
TOP
Immediate
BOTTOM
BOTTOM
BOTTOM
BOTTOM
BOTTOM
TOP
Immediate
BOTTOM
CS11
R/W
1
0
ATmega32A
x
103.)
CS10
R/W
0
0
TOV1 Flag Set
on
MAX
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TOP
BOTTOM
BOTTOM
BOTTOM
BOTTOM
MAX
TOP
TOP
TCCR1B
114

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