ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 219
ATmega32A
Manufacturer Part Number
ATmega32A
Description
Manufacturer
Atmel Corporation
Specifications of ATmega32A
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
32
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA32A
Manufacturer:
Atmel
Quantity:
150
Part Number:
ATMEGA32A
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega32A-AU
Manufacturer:
ATMEL
Quantity:
5 600
Part Number:
ATmega32A-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega32A-AUR
Manufacturer:
SMD
Quantity:
5
Part Number:
ATmega32A-MU
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
ATmega32A-PU
Manufacturer:
ATMEL
Quantity:
3 000
Company:
Part Number:
ATmega32A-PU
Manufacturer:
Atmel
Quantity:
26 792
22.7.3
22.7.4
8155C–AVR–02/11
Offset Compensation Schemes
ADC Accuracy Definitions
Figure 22-9. ADC Power Connections
The gain stage has a built-in offset cancellation circuitry that nulls the offset of differential mea-
surements as much as possible. The remaining offset in the analog path can be measured
directly by selecting the same channel for both differential inputs. This offset residue can be then
subtracted in software from the measurement results. Using this kind of software based offset
correction, offset on any channel can be reduced below one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
(at 0.5 LSB). Ideal value: 0 LSB.
PA4 (ADC4)
PA5 (ADC5)
PA6 (ADC6)
PA7 (ADC7)
AREF
GND
AVCC
PC7
n
ATmega32A
-1.
REF
in 2
n
steps
219