ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 281

• Manufacturer Part Number: ATmega32A
• Manufacturer: Atmel Corporation

Specifications of ATmega32A

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

26.9
26.9.1
8155C–AVR–02/11
SPI Serial Programming Pin Mapping
SPI Serial Programming Algorithm
Table 26-12. Pin Mapping SPI Serial Programming
Figure 26-10. SPI Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need to first execute the Chip Erase instruc-
tion. The Chip Erase operation turns the content of every memory location in both the Program
and EEPROM arrays into $FF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Low: > 2 CPU clock cycles for f
High: > 2 CPU clock cycles for f
When writing serial data to the ATmega32A, data is clocked on the rising edge of SCK.
When reading data from the ATmega32A, data is clocked on the falling edge of SCK. See
26-11
To program and verify the ATmega32A in the SPI Serial Programming mode, the following
sequence is recommended (See four byte instruction formats in
for timing details.
1. If the device is clocked by the Internal Oscillator, it is no need to connect a clock source to the
2. V
Symbol
MOSI
MISO
SCK
XTAL1 pin.
CC
-0.3V < AVCC < V
MOSI
MISO
SCK
CC
Pins
ck
ck
PB5
PB6
PB7
< 12MHz, 3 CPU clock cycles for f
< 12MHz, 3 CPU clock cycles for f
+0.3V, however, AVCC should always be within 2.7V - 5.5V
PB5
PB6
PB7
XTAL1
RESET
GND
I/O
O
I
I
(1)
AVCC
VCC
Description
Serial Data in
Serial Data out
Serial Clock
+2.7 - 5.5V
+2.7 - 5.5V
Table
ck
ck
(2)
26-14):
ATmega32A
12MHz
12MHz
Figure
281