ATmega32A Atmel Corporation, ATmega32A Datasheet - Page 73

• Manufacturer Part Number: ATmega32A
• Manufacturer: Atmel Corporation

Specifications of ATmega32A

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

14. 8-bit Timer/Counter0 with PWM
14.1
14.2
14.2.1
8155C–AVR–02/11
Features
Overview
Registers
•
•
•
•
•
•
•
Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module. A simpli-
fied block diagram of the 8-bit Timer/Counter is shown in
of I/O pins, refer to
bits and I/O pins, are shown in bold. The device-specific I/O Register and bit locations are listed
in the
Figure 14-1. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0) are 8-bit registers. Interrupt
request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer Interrupt Flag
Register (TIFR). All interrupts are individually masked with the Timer Interrupt Mask Register
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0)
“Register Description” on page
Timer/Counter
“Pinout ATmega32A” on page
TCNTn
OCRn
=
direction
BOTTOM
count
clear
= 0
84.
Control Logic
=
TCCRn
TOP
0xFF
2. CPU accessible I/O Registers, including I/O
clk
Figure
Tn
Generation
Waveform
14-1. For the actual placement
Clock Select
( From Prescaler )
Detector
Edge
ATmega32A
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
73