ATmega644P Atmel Corporation, ATmega644P Datasheet - Page 297

• Manufacturer Part Number: ATmega644P
• Manufacturer: Atmel Corporation

Specifications of ATmega644P

• Flash (kbytes): 64 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 32
• Ext Interrupts: 32
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 1
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 6
• Input Capture Channels: 1
• Pwm Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

24.6
24.6.1
8011O–AVR–07/10
Parallel Programming Parameters, Pin Mapping, and Commands
Signal Names
This section describes how to parallel program and verify Flash Program memory, EEPROM
Data memory, Memory Lock bits, and Fuse bits in the ATmega164P/324P/644P. Pulses are
assumed to be at least 250 ns unless otherwise noted.
In this section, some pins of the ATmega164P/324P/644P are referenced by signal names
describing their functionality during parallel programming, see
ure 24-9 on page
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
commands are shown in
Figure 24-1. Parallel Programming
Note:
Table 24-9.
Programming Mode
Signal Name in
RDY/BSY
1. Unused Pins should be left floating.
BS1
XA0
XA1
WR
OE
Pin Name Mapping
297. Pins not described in the following table are referenced by pin names.
Table 24-13 on page
RDY/BSY
Pin Name
Table 24-12 on page
PAGEL
+12V
BS2
PD1
PD2
PD3
PD4
PD5
PD6
BS1
XA0
XA1
WR
OE
(1)
I/O
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
O
PA0
I
I
I
I
I
Function
0: Device is busy programming, 1: Device is ready for
new command.
Output Enable (Active low).
Write Pulse (Active low).
Byte Select 1.
XTAL Action Bit 0
XTAL Action Bit 1
298.
298.
ATmega164P/324P/644P
PB7 - PB0
AVCC
VCC
+5V
+5V
Figure 24-1 on page 297
DATA
and
Fig-
297