ATmega6450 Atmel Corporation, ATmega6450 Datasheet - Page 144

• Manufacturer Part Number: ATmega6450
• Manufacturer: Atmel Corporation

Specifications of ATmega6450

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 25
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2570N–AVR–05/11
• Bit 5:4 – COM2A1:0: Compare Match Output Mode A
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to OC2A pin must be
set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM21:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 18-3.
Table 18-4
mode.
Table 18-4.
Note:
Table 18-5
rect PWM mode.
Table 18-5.
Note:
COM2A1
COM2A1
COM2A1
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
pare match is ignored, but the set or clear is done at BOTTOM. See
page 136
pare match is ignored, but the set or clear is done at TOP. See
page 138
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase cor-
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
COM2A0
COM2A0
COM2A0
0
1
0
1
0
1
0
1
0
1
0
1
for more details.
for more details.
Table 18-3
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match, set OC2A at BOTTOM,
(non-inverting mode).
Set OC2A on compare match, clear OC2A at BOTTOM,
(inverting mode).
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match when up-counting. Set OC2A on
compare match when counting down.
Set OC2A on compare match when up-counting. Clear OC2A on
compare match when counting down.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
shows the COM2A1:0 bit functionality when the WGM21:0 bits
ATmega325/3250/645/6450
(1)
(1)
“Phase Correct PWM Mode” on
“Fast PWM Mode” on
144