ATmega6450 Atmel Corporation, ATmega6450 Datasheet - Page 359

• Manufacturer Part Number: ATmega6450
• Manufacturer: Atmel Corporation

Specifications of ATmega6450

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 25
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

2570N–AVR–05/11
24 JTAG Interface and On-chip Debug System ..................................... 218
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 224
26 Boot Loader Support – Read-While-Write Self-Programming ......... 251
23.3
23.4
23.5
23.6
23.7
23.8
24.1
24.2
24.3
24.4
24.5
24.6
24.7
24.8
24.9
24.10
25.1
25.2
25.3
25.4
25.5
25.6
25.7
25.8
26.1
26.2
26.3
26.4
26.5
26.6
26.7
26.8
Starting a Conversion ....................................................................................203
Prescaling and Conversion Timing ................................................................204
Changing Channel or Reference Selection ...................................................206
ADC Noise Canceler .....................................................................................207
ADC Conversion Result .................................................................................211
Register Description ......................................................................................213
Features ........................................................................................................218
Overview ........................................................................................................218
TAP – Test Access Port ................................................................................218
TAP Controller ...............................................................................................220
Using the Boundary-scan Chain ....................................................................221
Using the On-chip Debug System .................................................................221
On-chip Debug Specific JTAG Instructions ...................................................222
Using the JTAG Programming Capabilities ...................................................223
Bibliography ...................................................................................................223
Register Description ......................................................................................223
Features ........................................................................................................224
System Overview ...........................................................................................224
Data Registers ...............................................................................................224
Boundary-scan Specific JTAG Instructions ...................................................226
Boundary-scan Related Register in I/O Memory ...........................................227
Boundary-scan Chain ....................................................................................228
Boundary-scan Order ....................................................................................237
Boundary-scan Description Language Files ..................................................250
Features ........................................................................................................251
Overview ........................................................................................................251
Application and Boot Loader Flash Sections .................................................251
Read-While-Write and No Read-While-Write Flash Sections ........................252
Boot Loader Lock Bits ...................................................................................254
Entering the Boot Loader Program ................................................................255
Addressing the Flash During Self-Programming ...........................................256
Self-Programming the Flash ..........................................................................257
ATmega325/3250/645/6450
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