ATmega6450 Atmel Corporation, ATmega6450 Datasheet - Page 280

• Manufacturer Part Number: ATmega6450
• Manufacturer: Atmel Corporation

Specifications of ATmega6450

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 25
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

27.7
27.7.1
2570N–AVR–05/11
Serial Downloading
Serial Programming Pin Mapping
Table 27-12. Parallel Programming Characteristics, V
Notes:
Both the Flash and EEPROM memory arrays can be programmed using the serial SPI bus while
RESET is pulled to GND. The serial interface consists of pins SCK, MOSI (input) and MISO (out-
put). After RESET is set low, the Programming Enable instruction needs to be executed first
before program/erase operations can be executed. NOTE, in
mapping for SPI programming is listed. Not all parts use the SPI pins dedicated for the internal
SPI interface.
Table 27-13. Pin Mapping Serial Programming
Figure 27-10. Serial Programming and Verify
Notes:
When programming the EEPROM, an auto-erase cycle is built into the self-timed programming
operation (in the Serial mode ONLY) and there is no need to first execute the Chip Erase
instruction. The Chip Erase operation turns the content of every memory location in both the
Program and EEPROM arrays into 0xFF.
Depending on CKSEL Fuses, a valid clock must be present. The minimum low and high periods
for the serial clock (SCK) input are defined as follows:
Symbol
t
t
t
BVDV
OLDV
OHDZ
Symbol
1. t
2. t
1. If the device is clocked by the internal Oscillator, it is no need to connect a clock source to the
2. V
MOSI
MISO
SCK
commands.
XTAL1 pin.
WLRH
WLRH_CE
CC
Parameter
BS1 Valid to DATA valid
OE Low to DATA Valid
OE High to DATA Tri-stated
- 0.3V < AVCC < V
is valid for the Write Flash, Write EEPROM, Write Fuse bits and Write Lock bits
is valid for the Chip Erase command.
Pins
PB2
PB3
PB1
CC
MOSI
MISO
SCK
+ 0.3V, however, AVCC should always be within 1.8 - 5.5V
RESET
XTAL1
GND
I/O
O
ATmega325/3250/645/6450
I
I
(1)
AVCC
VCC
CC
+1.8 - 5.5V
+1.8 - 5.5V
= 5V ± 10% (Continued)
Min
0
(2)
Table 27-13 on page
Serial Data out
Serial Data in
Description
Serial Clock
Typ
Max
250
250
250
Units
ns
ns
ns
280, the pin
280