ATmega6490 Atmel Corporation, ATmega6490 Datasheet - Page 233
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATmega6490
Manufacturer Part Number
ATmega6490
Description
Manufacturer
Atmel Corporation
Specifications of ATmega6490
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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23.2.5
23.2.6
2552K–AVR–04/11
Low Power Waveform
Operation in Sleep Mode
Figure 23-6. Driving a LCD with Four Common Terminals
To reduce toggle activity and hence power consumption a low power waveform can be selected
by writing LCDAB to one. Low power waveform requires two subsequent frames with the same
display data to obtain zero DC voltage. Consequently data latching and Interrupt Flag is only set
every second frame. Default and low power waveform is shown in
1/3 bias. For other selections of duty and bias, the effect is similar.
Figure 23-7. Default and Low Power Waveform
When synchronous LCD clock is selected (LCDCS = 0) the LCD display will operate in Idle
mode and Power-save mode with any clock source.
An asynchronous clock from TOSC1 can be selected as LCD clock by writing the LCDCS bit to
one when Calibrated Internal RC Oscillator is selected as system clock source. The LCD will
then operate in Idle mode, ADC Noise Reduction mode and Power-save mode.
-
-
-
-
2
1
2
1
2
1
1
2
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
-V
3
3
3
3
3
3
3
3
-V
V
V
V
V
V
V
V
V
V
V
V
GND
GND
GND
V
V
V
GND
V
V
V
GND
V
V
V
GND
V
V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
Frame
Frame
SEG0
COM0
SEG0 - COM0
SEG0
COM0
SEG0 - COM0
ATmega329/3290/649/6490
-
-
-
-
2
1
2
1
2
1
1
2
2
1
2
1
2
1
1
2
/
/
/
/
/
/
/
/
3
3
3
3
3
3
3
3
/
/
/
/
/
/
/
/
-V
3
3
3
3
3
3
3
3
V
V
V
V
V
V
V
V
V
V
V
-V
GND
GND
GND
V
V
V
GND
V
V
V
GND
V
V
V
GND
V
V
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
LCD
Frame
Frame
Figure 23-7
Frame
Frame
SEG0
COM0
SEG0 - COM0
for 1/3 duty and
SEG0
COM1
SEG0 - COM1
233
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