ATmega6490 Atmel Corporation, ATmega6490 Datasheet - Page 37
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ATmega6490
Manufacturer Part Number
ATmega6490
Description
Manufacturer
Atmel Corporation
Specifications of ATmega6490
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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9.5
9.6
9.7
9.7.1
9.7.2
2552K–AVR–04/11
Standby Mode
Power Reduction Register
Minimizing Power Consumption
Analog to Digital Converter
Analog Comparator
If Timer/Counter2 and/or the LCD controller are enabled, they will keep running during sleep.
The device can wake up from either Timer Overflow or Output Compare event from
Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable bits are set in TIMSK2,
and the Global Interrupt Enable bit in SREG is set. It can also wake up from an LCD controller
interrupt.
If neither Timer/Counter2 nor the LCD controller is running, Power-down mode is recommended
instead of Power-save mode.
The LCD controller and Timer/Counter2 can be clocked both synchronously and asynchronously
in Power-save mode. The clock source for the two modules can be selected independent of
each other. If neither the LCD controller nor the Timer/Counter2 is using the asynchronous
clock, the Timer/Counter Oscillator is stopped during sleep. If neither the LCD controller nor the
Timer/Counter2 is using the synchronous clock, the clock source is stopped during sleep. Note
that even if the synchronous clock is running in Power-save, this clock is only available for the
LCD controller and Timer/Counter2.
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected, the
SLEEP instruction makes the MCU enter Standby mode. This mode is identical to Power-down
with the exception that the Oscillator is kept running. From Standby mode, the device wakes up
in six clock cycles.
The Power Reduction Register (PRR), see
vides a method to stop the clock to individual peripherals to reduce power consumption. The
current state of the peripheral is frozen and the I/O registers inaccessible. Resources used by
the peripheral when stopping the clock will remain occupied so the peripheral should be disabled
before stopping the clock. Waking up a peripheral, which is done by clearing the bit in PRR, puts
the peripheral in the same state as before shutdown.
Peripheral shutdown can be used in Idle mode and Active mode to reduce the overall power
consumption. In all other sleep modes, the clock is already stopped.
There are several possibilities to consider when trying to minimize the power consumption in an
AVR controlled system. In general, sleep modes should be used as much as possible, and the
sleep mode should be selected so that as few as possible of the device’s functions are operat-
ing. All functions not needed should be disabled. In particular, the following modules may need
special consideration when trying to achieve the lowest possible power consumption.
If enabled, the ADC will be enabled in all sleep modes. To save power, the ADC should be dis-
abled before entering any sleep mode. When the ADC is turned off and on again, the next
conversion will be an extended conversion. Refer to
for details on ADC operation.
When entering Idle mode, the Analog Comparator should be disabled if not used. When entering
ADC Noise Reduction mode, the Analog Comparator should be disabled. In other sleep modes,
“PRR – Power Reduction Register” on page
ATmega329/3290/649/6490
“Analog to Digital Converter” on page 211
40, pro-
37