ATmega6490 Atmel Corporation, ATmega6490 Datasheet - Page 389
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ATmega6490
Manufacturer Part Number
ATmega6490
Description
Manufacturer
Atmel Corporation
Specifications of ATmega6490
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
32
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
160
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATmega6490-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega6490-16AU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
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Manufacturer:
Atmel
Quantity:
1 500
Company:
Part Number:
ATmega6490A-AU
Manufacturer:
Atmel
Quantity:
1 250
Company:
Part Number:
ATmega6490A-AUR
Manufacturer:
Maxim
Quantity:
43
Company:
Part Number:
ATmega6490P-AU
Manufacturer:
Atmel
Quantity:
779
2552K–AVR–04/11
23 LCD Controller ..................................................................................... 228
24 JTAG Interface and On-chip Debug System ..................................... 245
25 IEEE 1149.1 (JTAG) Boundary-scan ................................................... 251
26 Boot Loader Support – Read-While-Write Self-Programming ......... 278
22.4
22.5
22.6
22.7
23.1
23.2
23.3
23.4
24.1
24.2
24.3
24.4
24.5
24.6
24.7
24.8
24.9
24.10
25.1
25.2
25.3
25.4
25.5
25.6
25.7
25.8
26.1
26.2
26.3
26.4
26.5
Prescaling and Conversion Timing ................................................................214
Changing Channel or Reference Selection ...................................................216
ADC Conversion Result .................................................................................221
Register Description ......................................................................................223
Features ........................................................................................................228
Mode of Operation .........................................................................................231
LCD Usage ....................................................................................................235
Register Description ......................................................................................239
Features ........................................................................................................245
Overview ........................................................................................................245
Test Access Port – TAP ................................................................................245
TAP Controller ...............................................................................................247
Using the Boundary-scan Chain ....................................................................248
Using the On-chip Debug System .................................................................248
On-chip Debug Specific JTAG Instructions ...................................................249
Using the JTAG Programming Capabilities ...................................................250
Bibliography ...................................................................................................250
Register Description ......................................................................................250
Features ........................................................................................................251
System Overview ...........................................................................................251
Data Registers ...............................................................................................251
Boundary-scan Specific JTAG Instructions ...................................................253
Boundary-scan Related Register in I/O Memory ...........................................254
Boundary-scan Chain ....................................................................................255
ATmega329/3290/649/6490 Boundary-scan Order .......................................264
Boundary-scan Description Language Files ..................................................277
Features ........................................................................................................278
Application and Boot Loader Flash Sections .................................................278
Read-While-Write and No Read-While-Write Flash Sections ........................278
Boot Loader Lock Bits ...................................................................................281
Entering the Boot Loader Program ................................................................282
ATmega329/3290/649/6490
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