ATUC64D3 Atmel Corporation, ATUC64D3 Datasheet - Page 113

• Manufacturer Part Number: ATUC64D3
• Manufacturer: Atmel Corporation

Specifications of ATUC64D3

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 48 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 25
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 51
• Ext Interrupts: 51
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.3.8
Table 9-8.
32000D–04/2011
Mnemonics
br{cond3}
br{cond4}
rjmp
acall
icall
mcall
rcall
scall
sscall
ret{cond4}
retd
rete
rets
retss
Instruction Flow
Instruction Flow
C
E
C
C
C
E
C
E
C
C
C
C
C
C
C
Operands / Syntax
disp
disp
disp
disp
Rd
Rp[disp]
disp
disp
Rs
Description
Branch if condition satisfied.
Relative jump.
Application call
Register inderect call.
Memory call.
Relative call.
Supervisor call
Secure State call
Conditional return from subroutine with
move and test of return value.
Conditional return from subroutine with
return of false value.
Conditional return from subroutine with
return of false value.
Conditional return from subroutine with
return of true value.
Return from debug mode
Return from event handler
Return from supervisor call
Return from secure state
Operation
if (cond3)
if (cond4)
PC ← PC + (SE(disp10)<<1)
LR ← PC + 2
PC ← ∗(ACBA + (ZE(disp8)<<2))
LR ← PC + 2
PC ← Rd
LR ← PC + 4
PC ← *((Rp && 0xFFFF_FFFC) +
(SE(disp16)<<2))
LR ← PC + 2
PC ← PC + (SE(disp10)<<1)
LR ← PC + 4
PC ← PC + (SE(disp21)<<1)
See Instruction Set Reference.
See Instruction Set Reference.
if (Rs != {SP, PC})
R12 ← Rs
PC ←LR
if (Rs = LR)
R12 ← -1
PC ←LR
if (Rs = SP)
R12 ← 0
PC ←LR
if (Rs = PC)
R12 ← 1
PC ←LR
SR ←RSR_DBG
PC ←LR_DBG
See Instruction Set Reference.
See Instruction Set Reference.
See Instruction Set Reference.
PC ← PC + (SE(disp8)<<1)
PC ← PC + (SE(disp21)<<1)
AVR32
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