ATUC64D3 Atmel Corporation, ATUC64D3 Datasheet - Page 271

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ATUC64D3

Manufacturer Part Number
ATUC64D3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATUC64D3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
32-bit AVR
# Of Touch Channels
25
Hardware Qtouch Acquisition
Yes
Max I/o Pins
51
Ext Interrupts
51
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATUC64D3-A2UR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATUC64D3-A2UT
Manufacturer:
Atmel
Quantity:
10 000
32000D–04/2011
PAVG.{UB/SH} – Packed Average
Architecture revision:
Architecture revision1 and higher.
Description
Computes the average of pairs of packed unsigned bytes (pavg.ub) or packed signed halfwords
(pavg.sh). The averages are computed by adding two values together while also adding in a
rounding factor in the least significant bit. The result is then halved by shifting it one position to
the right.
Operation:
I.
II.
Syntax:
I.
II.
Operands:
I, II.
Status Flags:
Opcode:
31
1
15
0
Rd[31:24] ← LSR(ZE(Rx[31:24], 9) + ZE(Ry[31:24], 9) + 1, 1);
Rd[23:16] ← LSR(ZE(Rx[23:16], 9) + ZE(Ry[23:16], 9) + 1, 1);
Rd[15:8] ← LSR(ZE(Rx[15:8], 9) + ZE(Ry[15:8], 9) + 1, 1);
Rd[7:0] ← LSR(ZE(Rx[7:0], 9) + ZE(Ry[7:0], 9) + 1, 1);
Rd[31:16] ← ASR(SE(Rx[31:16], 17) + SE(Ry[31:16], 17) + 1, 1);
Rd[15:0] ← ASR(SE(Rx[15:0], 17) + SE(Ry[15:0], 17) + 1, 1);
pavg.ub
pavg.sh
{d, x, y} ∈ {0, 1, …, 15}
Q:
V:
N:
Z:
C:
Format I:
1
0
29
1
1
Not affected.
Not affected.
Not affected.
Not affected.
Not affected.
28
0
Rd, Rx, Ry
Rd, Rx, Ry
0
Rx
0
25
1
24
0
1
0
1
1
0
0
0
4
20
0
0
3
19
Ry
Rd
AVR32
0
16
271

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