ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 127

• Manufacturer Part Number: ATUC64L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC64L4U

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

9.5.4
9.5.4.1
9.5.4.2
9.5.4.3
32002F–03/2010
Messages
Program Trace, Direct Branch
Program Trace, Direct Branch with Target Address
Program Trace, Indirect Branch
PTSY. In this case, the address of the instruction which generated the branch message can not
be explicitly reconstructed from the trace log, but the debugger will normally know which address
was returned to when Debug Mode was exited.
If a breakpoint occurs on the first instruction after exiting Debug Mode, a PTC message with
EVCODE = 0 is generated.
This message is output by the target processor whenever there is a change of program flow
caused by a conditional or unconditional branch. The instruction count (I-CNT) is included to
identify the branch address. The following AVR32 instructions can cause a direct branch:
Table 9-31.
Table 9-32.
This message is transmitted instead of the Direct Branch message when SQA enhanced pro-
gram trace is enabled by writing DC:SQA to one. This simplifies real-time PC reconstruction in
the emulator for real-time code coverage and performance analysis purposes.
Table 9-33.
An indirect branch is output by the target processor whenever there is a change of program flow
caused by a subroutine call, return instruction, interrupt, or exception.
Mnemonic
br{cond3}
br{cond4}
rjmp
Direct Branch Message
Packet Size
(bits)
8
6
Direct Branch Message with Sync
Size (bits)
32
8
6
Packet
Compact
Extended
Compact
Direct branch instructions
Direct Branch message without sync
Direct Branch message with Target Address
Packet
Name
U-ADDR
I-CNT
TCODE
Packet
Name
I-CNT
TCODE
Description
Branch if condition satisfied.
Branch if condition satisfied.
Packet
Type
Variable
Fixed
Packet
Type
Variable
Variable
Fixed
Direction: From target
Description
Number of bytes executed since the last taken branch.
Value = 3
Direction: From target
Description
The unique portion of the branch target address for a taken
indirect branch or exception. Most significant bits that have a
value of 0 are truncated.
Number of bytes executed since the last taken branch.
Value = 57
AVR32
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