ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 86

• Manufacturer Part Number: ATUC64L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC64L4U

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

32002F–03/2010
Instruction
ldm HSB++, r5, r6, r7, r8
stm HSB, r5, r6, r7, r8
add r6, r5
memc IRAM, 3
st.w IRAM[4], r8
memc IRAM, 3
mul r5, r9
memc HSB, 7
ld.w r4, IRAM[16]
memc HSB, 7
sub r7, r4
mul r6, r9
or r5, r8
Cycles
9
6
1
1
1
2
1
4
1
1
1
1
1
1+n=1+2r where r=#regs when reading from HSB addresses
1+n=1+(1+r) where r=#regs when writing to HSB addresses
Requires only one cycle because write buffer was empty
Instruction filling the write buffer
Requires 2 cycles because write buffer was not empty
Next instruction has a memory access, 3 stall cycles needed
Memory not accessed in the 3 following clock cycles, no stall
Description
Instruction not using the write buffer
AVR32
86