ATxmega16A4 Atmel Corporation, ATxmega16A4 Datasheet - Page 98
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ATxmega16A4
Manufacturer Part Number
ATxmega16A4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega16A4
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
7
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega16A4U-AU
Manufacturer:
SAMSUNG
Quantity:
514
Part Number:
ATxmega16A4U-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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8.6
8.6.1
8077H–AVR–12/09
Register Description – Power Reduction
PRGEN - General Power Reduction Register
Table 8-2.
• Bit 1 - SEN: Sleep Enable
This bit must be set to make the MCU enter the selected sleep mode when the SLEEP instruc-
tion is executed. To avoid unintentional entering of sleep modes, it is recommended to write
SEN just before executing the SLEEP instruction, and clearing it immediately after waking up.
• Bit 7:5 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 4 - AES: AES Module
Setting this bit stops the clock to the AES module. When the bit is cleared the peripheral should
be reinitialized to ensure proper operation.
• Bit 3 - EBI: External Bus Interface
Setting this bit stops the clock to the External Bus Interface. When the bit is cleared the periph-
eral should be reinitialized to ensure proper operation. Note that the EBI is not present for all
devices.
• Bit 2 - RTC: Real-Time Counter
Setting this stops the clock to the Real Time Counter. When the bit is cleared the peripheral
should be reinitialized to ensure proper operation.
• Bit 1 - EVSYS: Event System
Setting this stops the clock to the Event System. When the bit is cleared the module will continue
like before the shutdown.
• Bit 0 - DMA: DMA Controller
Setting this stops the clock to the DMA Controller. This bit can only be set if the DMA Controller
is disabled.
Bit
+0x00
Read/Write
Initial Value
SMODE[2:0]
101
110
111
R
7
0
-
Sleep mode
R
6
0
-
SEN
1
1
1
R
5
0
-
AES
R/W
4
0
Group Configuration
ESTDBY
R/W
STDBY
EBI
3
0
-
RTC
R/W
2
0
EVSYS
R/W
Description
Reserved
Standby Mode
Extended Standby Mode
1
0
XMEGA A
DMA
R/W
0
0
PRGEN
98
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