ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 113

• Manufacturer Part Number: ATxmega192D3
• Manufacturer: Atmel Corporation

Specifications of ATxmega192D3

• Flash (kbytes): 192 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 50
• Ext Interrupts: 50
• Usb Speed: No
• Usb Interface: No
• Spi: 5
• Twi (i2c): 2
• Uart: 3
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 5
• Output Compare Channels: 18
• Input Capture Channels: 18
• Pwm Channels: 18
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

11.13.11 INT0MASK - Interrupt 0 Mask Register
11.13.12 INT1MASK - Interrupt 1 Mask Register
11.13.13 INTFLAGS - Interrupt Flag Register
8210B–AVR–04/10
• Bit 7:0 - INT0MSK[7:0]: Interrupt 0 Mask Register
These bits are used to mask which pins can be used as sources for port interrupt 0. If
INT0MASKn is written to one, pin n is used as source for port interrupt 0.The input sense config-
uration for each pin is decided by the PINnCTRL-registers.
• Bit 7:0 - INT1MASK[7:0]: Interrupt 1 Mask Register
These bits are used to mask which pins can be used as sources for port interrupt 1. If
INT1MASKn is written to one, pin n is used as source for port interrupt 1.The input sense config-
uration for each pin is decided by the PINnCTRL-registers.
• Bit 7:2 - Reserved
These bits are reserved and will always be read as zero. For compatibility with future devices,
always write these bits to zero when this register is written.
• Bit 1:0 - INTnIF: Interrupt n Flag
The INTnIF flag is set when a pin change according to the pin's input sense configuration
occurs, and the pin is set as source for port interrupt n. Writing a one to this flag's bit location will
clear the flag. For enabling and executing the interrupt refer to the interrupt level description.
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
R/W
R/W
7
0
7
–
R
0
7
0
R/W
R/W
6
0
6
–
R
0
6
0
R/W
R/W
R
5
0
5
–
0
5
0
R/W
R/W
R
4
0
4
–
0
4
0
INT1MSK[7:0]
INT0MSK[7:0]
R/W
R/W
R
3
0
3
–
0
3
0
R/W
R/W
R
0
2
0
2
–
0
2
INT1IF
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA D
INT0IF
R/W
R/W
R/W
0
0
0
0
0
0
INT0MASK
INT1MASK
INTFLAGS
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