ATxmega192D3 Atmel Corporation, ATxmega192D3 Datasheet - Page 262
ATxmega192D3
Manufacturer Part Number
ATxmega192D3
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega192D3
Flash (kbytes)
192 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
50
Ext Interrupts
50
Usb Speed
No
Usb Interface
No
Spi
5
Twi (i2c)
2
Uart
3
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
16
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
18
Input Capture Channels
18
Pwm Channels
18
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
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Manufacturer
Quantity
Price
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CYPRESS
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101
Company:
Part Number:
ATxmega192D3-AU
Manufacturer:
ATMEL
Quantity:
70
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Part Number:
ATxmega192D3-H
Manufacturer:
SQ
Quantity:
719
Company:
Part Number:
ATxmega192D3-MH
Manufacturer:
Atmel
Quantity:
565
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22.3.5.1
8210B–AVR–04/10
Drive contention and collision detection
In order to reduce the effect of a drive contention (the PDI and the programmer drives the
PDI_DATA line at the same time), a mechanism for collision detection is supported. The mecha-
nism is based on the way the PDI drives data out on the PDI_DATA line. As shown in Figure 7,
the output pin driver is only active when the output value changes (from 0-1 or 1-0). Hence, if
two or more successive bit values are the same, the value is only actively driven the first clock
cycle. After this point the output driver is automatically tri-stated, and the PDI_DATA pin has a
bus-keeper responsible for keeping the pin-value unchanged until the output driver is re-enabled
due to a bit value change.
Figure 22-7. Driving data out on the PDI_DATA using bus-keeper
If the programmer and the PDI both drives the PDI_DATA line at the same time, the situation of
drive contention will occur as illustrated in
kept for two or more clock cycles, the PDI is able to verify that the correct bit value is driven on
the PDI_DATA line. If the programmer is driving the PDI_DATA line to the opposite bit value
than what the PDI expects, a collision is detected.
Figure 22-8. Drive contention and collision detection on the PDI_DATA line
As long as the PDI transmits alternating ones and zeros, collisions cannot be detected because
the output driver will be active all the time preventing polling of the PDI_DATA line. However,
within a single frame the two stop bits should always be transmitted as ones, enabling collision
detection at least once per frame.
Output enable
Programmer
Driven output
PDI output
PDI_CLK
PDI_DATA
Collision
PDI_CLK
PDI_DATA
output
detect
= Collision
1
1
0
0
Figure 22-8 on page
X
1
1
1
X
0
262. Every time a bit value is
1
0
XMEGA D
1
1
262
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