SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 414

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SAM3N2A

Manufacturer Part Number
SAM3N2A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2A

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
26.7.25
Name:
Access:
This register can only be written if the WPEN bit is cleared in
• P0-P31: Peripheral Select.
0 = Assigns the I/O line to the Peripheral A function.
1 = Assigns the I/O line to the Peripheral C function.
0 = Assigns the I/O line to the Peripheral B function.
1 = Assigns the I/O line to the Peripheral D function.
414
414
If the same bit is set to 0 in PIO_ABCDSR1:
If the same bit is set to 1 in PIO_ABCDSR1:
P31
P23
P15
P7
31
23
15
7
SAM3N
SAM3N
PIO Peripheral ABCD Select Register 2
P30
P22
P14
P6
30
22
14
PIO_ABCDSR2
Read-write
6
P13
P29
P21
P5
29
21
13
5
P28
P20
P12
P4
28
20
12
4
“PIO Write Protect Mode Register”
P11
P27
P19
P3
27
19
11
3
P26
P18
P10
P2
26
18
10
2
.
P25
P17
P9
P1
25
17
9
1
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
P24
P16
P8
P0
24
16
8
0

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