SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 553

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SAM3N2A

Manufacturer Part Number
SAM3N2A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N2A

Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Figure 30-28. SPI Transfer Format (CPHA=1, 8 bits per transfer)
Figure 30-29. SPI Transfer Format (CPHA=0, 8 bits per transfer)
30.7.7.4
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
SPI Master -> RXD
SCK cycle (for reference)
SPI Master -> TXD
SPI Master -> RTS
SPI Master -> RTS
SPI Slave -> RXD
SPI Master ->RXD
SPI Slave -> TXD
SPI Slave -> CTS
SPI Master ->TXD
SPI Slave -> RXD
SCK cycle (for reference)
SPI Slave -> TXD
SPI Slave -> CTS
(CPOL = 0)
(CPOL = 1)
(CPOL = 0)
(CPOL = 1)
MOSI
MISO
MOSI
MISO
SCK
SCK
NSS
Receiver and Transmitter Control
SCK
SCK
NSS
See “Receiver and Transmitter Control” on page 533.
MSB
1
1
MSB
MSB
MSB
2
2
6
6
6
6
3
3
5
5
5
5
4
4
4
4
4
4
5
5
3
3
3
3
6
6
6
2
2
2
2
7
7
1
1
1
1
8
LSB
8
LSB
LSB
LSB
SAM3N
SAM3N
553
553

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