SAM3N2A Atmel Corporation, SAM3N2A Datasheet - Page 472
SAM3N2A
Manufacturer Part Number
SAM3N2A
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N2A
Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
23
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
16
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Figure 28-11. Master Write with One, Two or Three Bytes Internal Address and One Data Byte
Figure 28-12. Master Read with One, Two or Three Bytes Internal Address and One Data Byte
28.8.6.2
472
472
TWD
TWD
TWD
TWD
TWD
TWD
Three bytes internal address
Two bytes internal address
One byte internal address
Three bytes internal address
Two bytes internal address
One byte internal address
S
S
S
SAM3N
SAM3N
S
S
S
10-bit Slave Addressing
DADR
DADR
DADR
DADR
DADR
DADR
W
W
W
For a slave address higher than 7 bits, the user must configure the address size (IADRSZ) and
set the other slave address bits in the internal address register (TWI_IADR). The two remaining
Internal address bytes, IADR[15:8] and IADR[23:16] can be used the same as in 7-bit Slave
Addressing.
Example: Address a 10-bit device (10-bit device address is b1 b2 b3 b4 b5 b6 b7 b8 b9 b10)
Figure 28-13
the use of internal addresses to access the device.
Figure 28-13. Internal Address Usage
1. Program IADRSZ = 1,
2. Program DADR with 1 1 1 1 0 b1 b2 (b1 is the MSB of the 10-bit address, b2, etc.)
3. Program TWI_IADR with b3 b4 b5 b6 b7 b8 b9 b10 (b10 is the LSB of the 10-bit
W
W
W
A
A
A
address)
IADR(23:16)
A
A
A
IADR(15:8)
IADR(7:0)
below shows a byte write to an Atmel AT24LC512 EEPROM. This demonstrates
IADR(23:16)
IADR(15:8)
IADR(7:0)
R
S
T
A
T
M
S
B
Address
Device
A
A
A
0
IADR(15:8)
Sr
IADR(7:0)
A
A
A
S
B
L
W
W
R
T
E
R
I
/
DADR
C
A
K
WORD ADDRESS
IADR(15:8)
IADR(7:0)
M
S
B
DATA
FIRST
R
A
A
Sr
IADR(7:0)
A
A
A
A
A
C
K
WORD ADDRESS
DADR
SECOND
IADR(7:0)
P
DATA
DATA
A
L
S
B
Sr
R
C
A
K
A
A
N
A
DADR
DATA
DATA
P
P
DATA
DATA
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
A
C
K
R
N
O
S
T
P
P
A
N
A
P
P
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