SAM7X512 Atmel Corporation, SAM7X512 Datasheet - Page 674
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SAM7X512
Manufacturer Part Number
SAM7X512
Description
Manufacturer
Atmel Corporation
Specifications of SAM7X512
Flash (kbytes)
512 Kbytes
Pin Count
100
Max. Operating Frequency
55 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
62
Ext Interrupts
62
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
3
Can
1
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
128
Self Program Memory
NO
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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678
Version
6120G
(Continued) Comments
SAM7X512/256/128
Electrical Characteristics,
Table 38-6, “Power Consumption for Different
assigned to Flash In standby mode. Footnote assigned to Ultra Low Power mode.
Section 38.7 ”ADC
“Transfer
Table 38-9, “Main Oscillator
Table 38-11, “XIN Clock Electrical
Figure 38-2, ”XIN CLock Timing” on page
Table 38-2, “DC
Section 39.1 “Thermal Conditions”, removed.
Table 39-3, “Package Reference”
Errata,
“AT91SAM7X256/128 Errata - Rev. A
Section 41.3.2 “Controller Area Network (CAN)” on page
Section 41.3.10.1 ”USART: CTS in Hardware
Section 41.3.10.3 “USART: RXBRK Flag Error in Asynchronous Mode” on page
Section 41.3.10.4 “USART: DCD is Active High instead of Low.” on page
Section 41.3.1 “Analog-to-Digital Converter (ADC)” on page
Section 41.3.7.6 “SPI: Bad Serial Clock Generation on 2nd Chip Select” on page
“AT91SAM7X512 Errata - Rev. A
Section 41.4.2 “Controller Area Network (CAN)” on page
Section 41.4.11.1 ”USART: CTS in Hardware
Section 41.4.11.3 “USART: RXBRK Flag Error in Asynchronous Mode” on page
Section 41.4.11.4 “USART: DCD is Active High instead of Low.” on page
Section 41.4.1 “Analog-to-Digital Converter (ADC)” on page
Section 41.4.8.6 “SPI: Bad Serial Clock Generation on 2nd Chip Select” on page
Characteristics”, reference to Data Converter Terminology added below table.
Characteristics”, removed reference to Tj
Characteristics”, INL and DN updated and Absolute accuracy added to
Characteristics”, added schematic in footnote to C
Parts”:
JESD97 Classification changed to e3.
Characteristics”, added t
Parts”:
616, added figure.
Handshaking”, updated.
Handshaking”, updated.
Modes”; Active mode consumption values updated. Footnote
640, added
649, added
CLCH
638, added
647, added
and t
CHCL
646, added.
655, added
to table, t
L
and C
645, added.
654, added
643, added
652, added
CHXIN
LEXT
and t
Table 38-18,
symbols.
CLXIN
updated.
6120I–ATARM–06-Apr-11
Change
Request
Ref.
4596/
4597
4007
3866
3967
4659
4968
4648
3956
4645
4750
4648
3956
4645
4750
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