SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 120
SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Coprocessor Interface
4.7
4-16
Undefined instructions
Undefined instructions are treated by the ARM7TDMI processor as coprocessor
instructions. All coprocessors must be absent, CPA and CPB must be HIGH, when an
undefined instruction is presented. The ARM7TDMI processor takes the undefined
instruction trap.
For undefined instructions to be handled correctly, any coprocessors in a system must
give the absent response (CPA and CPB HIGH) to an undefined instruction. This allows
the core to take the undefined instruction exception.
The coprocessor must check bit 27 of the instruction to differentiate between the
following instruction types:
•
•
Coprocessor instructions are not supported in the Thumb instruction set but undefined
instructions are. All coprocessors must monitor the state of the TBIT output from
ARM7TDMI core. When the ARM7TDMI core is in Thumb state, coprocessors must
drive CPA and CPB HIGH, and the instructions seen on the data bus must be ignored.
In this way, coprocessors do not execute Thumb instructions in error, and all undefined
instructions are handled correctly.
undefined instructions have 0 in bit 27
coprocessor instructions have 1 in bit 27.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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