SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 228
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SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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Debug in Depth
B.5.2
B.5.3
B.5.4
B-10
SCAN_N (0010)
SAMPLE/PRELOAD (0011)
RESTART (0100)
The EXTEST instruction connects the selected scan chain between TDI and TDO.
When the instruction register is loaded with the EXTEST instruction, all of the scan
cells are placed in their test mode of operation:
•
•
The SCAN_N instruction connects the scan path select register between TDI and TDO:
•
•
•
•
The scan path select register is 4 bits long in this implementation, although no finite
length is specified. The least significant bit of the scan path select register is shifted
in/out first.
This instruction is included for production test only and must never be used on the scan
chains provided by the ARM7TDMI core. It can be used on user-added scan chains such
as boundary-scan chains.
The RESTART instruction restarts the processor on exit from debug state. The
RESTART instruction connects the bypass register between TDI and TDO. The TAP
controller behaves as if the BYPASS instruction had been loaded.
The processor exits debug state when the RUN-TEST-IDLE state is entered.
In the CAPTURE-DR state, inputs from the system logic and outputs from the
output scan cells to the system are captured by the scan cells.
In the SHIFT-DR state, the previously captured test data is shifted out of the scan
chain using TDO, while new test data is shifted in using the TDI input. This data
is applied immediately to the system logic and system pins.
In the CAPTURE-DR state, the fixed value 1000 is loaded into the register.
In the SHIFT-DR state, the ID number of the desired scan path is shifted into the
scan path select register.
In the UPDATE-DR state, the scan register of the selected scan chain is connected
between TDI and TDO and remains connected until a subsequent SCAN_N
instruction is issued.
On reset, scan chain 3 is selected by default.
Copyright © 1994-2001. All rights reserved.
ARM DDI 0029G
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