SAM9M10 Atmel Corporation, SAM9M10 Datasheet - Page 121
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SAM9M10
Manufacturer Part Number
SAM9M10
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9261.pdf
(248 pages)
3.SAM9M10.pdf
(59 pages)
4.SAM9M10.pdf
(1398 pages)
Specifications of SAM9M10
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
400 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Hi-Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
2
Uart
5
Lin
4
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
Yes
Camera Interface
Yes
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
440
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
2
Dram Memory
DDR2/LPDDR, SDRAM/LPSDR
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
0.9 to 1.1
Fpu
No
Mpu / Mmu
No / Yes
Timers
6
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
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4.8
ARM DDI 0029G
Privileged instructions
The output signal nTRANS allows the implementation of coprocessors, or coprocessor
instructions, that can only be accessed from privileged modes. The signal meanings are
given in Table 4-4.
If used, the nTRANS signal must be sampled at the same time as the coprocessor
instruction is fetched and is used in the coprocessor pipeline Decode stage.
If a User mode process, with nTRANS LOW, tries to access a coprocessor instruction
that can only be executed in a privileged mode, the coprocessor responds with CPA and
CPB HIGH. This causes the ARM7TDMI processor to take the undefined instruction
trap.
Note
Copyright © 1994-2001. All rights reserved.
Table 4-4 Mode identifier signal meanings (nTRANS)
nTRANS
0
1
Meaning
User mode instruction
Privileged mode instruction
Coprocessor Interface
4-17
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